308 lines
8.5 KiB
Plaintext
308 lines
8.5 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*/
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//rk3566-evb1-ddr4-v10
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#include "rk3566-evb1-ddr4-v10.dtsi"
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#include "../rk3568-linux.dtsi"
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#include "rp-mipi-camera-gc2093-rk3566.dtsi"
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/****************** SINGLE LCD ***************/
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#include "rp-rk3566-single-lcd-gpio.dtsi"
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/* HDMI */
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//#include "rp-lcd-hdmi.dtsi"
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/* MIPI DSI0 */
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//#include "rp-lcd-mipi0-5-720-1280.dtsi"
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//#include "rp-lcd-mipi0-5.5-1080-1920.dtsi"
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//#include "rp-lcd-mipi0-5.5-720-1280.dtsi"
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//#include "rp-lcd-mipi0-5.5-720-1280-v2.dtsi"
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#include "rp-lcd-mipi0-7-1024-600.dtsi"
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//#include "rp-lcd-mipi0-7-1200-1920.dtsi"
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//#include "rp-lcd-mipi0-8-800-1280.dtsi"
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//#include "rp-lcd-mipi0-8-800-1280-v2.dtsi"
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//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
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//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
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//#include "rp-lcd-mipi0-10-800-1280.dtsi"
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//#include "rp-lcd-mipi0-10-800-1280-v2.dtsi"
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//#include "rp-lcd-mipi0-10-1920-1200.dtsi"
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/* LVDS */
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//#include "rp-lcd-lvds-10-1024-600.dtsi"
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/* EDP */
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//#include "rp-lcd-edp-13-1920-1080.dtsi"
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//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
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/ {
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model = "rp-rk3566";
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compatible = "rpdzkj,rp-rk3566", "rockchip,rk3566";
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fan_gpio_control {
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compatible = "fan_gpio_control";
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gpio-pin = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
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temperature-device = "soc-thermal";
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temp-on = <60000>;
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time = <10000>;
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status = "okay";
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};
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rp_power{
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status = "okay";
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compatible = "rp_power";
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rp_not_deep_sleep = <1>;
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//#define GPIO_FUNCTION_OUTPUT 0
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//#define GPIO_FUNCTION_INPUT 1
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//#define GPIO_FUNCTION_IRQ 2
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//#define GPIO_FUNCTION_FLASH 3
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//#define GPIO_FUNCTION_OUTPUT_CTRL 4
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/******* SYSTEM POWER **********/
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pwer_5v_3v3 { //vdd 3.3v 5v enable
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gpio_num = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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led { //system led
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gpio_num = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb_pwr { //usb host and otg power
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gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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hub_rst { //usb hub reset
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gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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spk_en { //SPK ENABLE
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gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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spk_mute { //SPK MUTE, hish active, nomal low
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gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
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gpio_function = <4>;
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};
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otg_mode { //OTG SWITCH, high is mean otg_id to 0, foece host mode
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gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
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gpio_function = <0>;
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};
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//fan { //fan en
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// gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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//};
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};
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rp_gpio{
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status = "okay";
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compatible = "rp_gpio";
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/***** gpio ********/
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gpio4a0 {
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gpio_num = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio4a1 {
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gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio4a2 {
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gpio_num = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio4a3 {
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gpio_num = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio1b2 {
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gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio3c1 {
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gpio_num = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio1b0 {
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gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio0c4 {
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gpio_num = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio1a4 {
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gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio0c5 {
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gpio_num = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio2b4 {
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gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <2>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m0_xfer>;
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status = "okay";
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};
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};
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&pmu_io_domains {
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status = "okay";
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pmuio2-supply = <&vcc3v3_pmu>;
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vccio1-supply = <&vccio_acodec>;
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vccio3-supply = <&vccio_sd>;
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vccio4-supply = <&vcc_3v3>;
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vccio5-supply = <&vcc_3v3>;
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vccio6-supply = <&vcc_1v8>;
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vccio7-supply = <&vcc_3v3>;
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};
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&i2c5 {
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status = "disabled";
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};
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&i2c0 {
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status = "okay";
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vdd_cpu: tcs4525@1c {
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compatible = "tcs,tcs452x";
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reg = <0x1c>;
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vin-supply = <&vcc5v0_sys>;
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regulator-compatible = "fan53555-reg";
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regulator-name = "vdd_cpu";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1390000>;
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regulator-ramp-delay = <2300>;
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fcs,suspend-voltage-selector = <1>;
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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&gmac1 {
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tx_delay = <0x3a>;
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rx_delay = <0x2a>;
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};
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&i2c4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m1_xfer>;
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rtc@51 {
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status = "okay";
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compatible = "rtc,hym8563";
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reg = <0x51>;
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};
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};
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&uart3 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart3m0_xfer>;
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};
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&uart6 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart6m0_xfer>;
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};
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&uart7 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart7m0_xfer>;
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};
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&uart9 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart9m0_xfer>;
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};
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&spi1 {
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status = "okay";
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/* rewrite pinctrl, for cs1 used to be gpio */
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pinctrl-0 = <&spi1m0_cs0 &spi1m0_pins>;
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pinctrl-1 = <&spi1m0_cs0 &spi1m0_pins_hs>;
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spi1_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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&spi2 {
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status = "okay";
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/* rewrite pinctrl, for cs1 used to be gpio */
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pinctrl-0 = <&spi2m0_cs0 &spi2m0_pins>;
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pinctrl-1 = <&spi2m0_cs0 &spi2m0_pins_hs>;
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spi2_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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&spi3 {
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status = "okay";
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spi3_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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/****** rp3566 camera configuration adjustment ******/
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&spi3 {
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/* rewrite pinctrl for cs1 used to be camera clk */
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pinctrl-0 = <&spi3m0_cs0 &spi3m0_pins>;
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pinctrl-1 = <&spi3m0_cs0 &spi3m0_pins_hs>;
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};
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/***************************************************/
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&dmc {
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status = "disabled";
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};
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&dfi {
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status = "disabled";
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};
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