568 lines
17 KiB
Plaintext
568 lines
17 KiB
Plaintext
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/ {
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backlight: backlight {
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status = "okay";
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compatible = "pwm-backlight";
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pwms = <&pwm0 0 25000 0>;
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <255>;
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};
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//bill
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rpdzkj_config {
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compatible = "rp_config";
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user_version = "rpdzkj";
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system_rotate = "0";
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back_camera_rotate = "0";
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front_camera_rotate = "0";
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lcd_density = "160";
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language = "zh-CN"; //zh-CN //en-US
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time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +0
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not_navigation_bar = "false";
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not_status_bar = "false";
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default_launcher = "true";
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has_root = "true"; //true//false
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usb_not_permission = "true";
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usb_camera_only_front = "false";
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gps_use = "false";
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gps_serial_port = "/dev/ttyS5"; //UART4
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status = "okay";
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};
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};
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&hdmi {
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#address-cells = <1>;
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#size-cells = <0>;
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#sound-dai-cells = <0>;
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ddc-i2c-scl-high-time-ns = <9625>;
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ddc-i2c-scl-low-time-ns = <10000>;
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status = "okay";
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};
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&pwm0 {
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status = "okay";
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};
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&i2c4 {
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status = "okay";
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goodix_ts@5d {
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compatible = "goodix,gt9xx";
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reg = <0x5d>;
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gtp_resolution_x = <800>;
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gtp_resolution_y = <1280>;
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gtp_int_tarigger = <1>;
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gtp_change_x2y = <0>;
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gtp_overturn_x = <0>;
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gtp_overturn_y = <0>;
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gtp_send_cfg = <1>;
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gtp_touch_wakeup = <1>;
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goodix_rst_gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
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goodix_irq_gpio = <&gpio1 22 IRQ_TYPE_EDGE_RISING>;
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goodix,cfg-group0 = [
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45 20 03 00 05 05 35 00 01 C8 1E 0F 50 32
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03 05 00 00 00 00 00 00 04 18 1A 1E 14 8C
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2E 0E 1E 20 EB 04 00 00 00 BA 02 2D 00 00
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00 00 00 03 00 00 00 00 00 0F 2D 94 D5 02
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07 00 00 04 E6 10 00 BB 14 00 92 1A 00 78
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20 00 61 28 00 61 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00
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1C 1A 18 16 14 12 10 0E 0C 0A 08 06 04 02
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00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00 00 2A 29 28 26 24 22 21 20 1F 1E 1D 1C
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18 16 00 02 04 06 08 0A 0C 0F 10 12 13 14
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00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00 00 CB 01
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];
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goodix,cfg-group5 = [
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00 20 03 00 05 0A 05 00 01 08 28 08
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50 32 03 05 00 00 00 00 00 00 00 18
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1A 1E 14 8C 2C 0E 17 15 31 0D 00 00
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02 9B 04 1D 00 00 00 00 00 03 64 32
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00 00 00 11 25 94 C5 02 07 00 00 04
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60 12 00 5D 15 00 57 19 00 54 1D 00
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4F 22 00 4F 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 1C 1A 18 16 14 12 10 0E
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0C 0A 08 06 04 02 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 28 26
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24 22 21 20 1F 1E 1D 1C 18 16 14 13
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00 02 04 06 08 0A 0C 0F 10 12 FF FF
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00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 2F 01];
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};
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};
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&display_subsystem {
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status = "okay";
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ports = <&vopb_out>, <&vopl_out>;
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logo-memory-region = <&drm_logo>;
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route {
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route_hdmi: route-hdmi {
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status = "okay";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vopl_out_hdmi>;
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};
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route_dsi: route-dsi {
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status = "okay";
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//status = "disabled";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vopb_out_dsi>;
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};
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route_dsi1: route-dsi1 {
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status = "disabled";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "fullscreen";
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charge_logo,mode = "center";
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connect = <&vopl_out_dsi1>;
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};
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route_edp: route-edp {
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status = "disabled";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "fullscreen";
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charge_logo,mode = "center";
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connect = <&vopb_out_edp>;
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};
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};
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};
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&dsi {
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status = "okay";
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rockchip,lane-rate = <480>;
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panel {
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compatible ="simple-panel-dsi";
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status = "okay";
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reg = <0>;
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power-supply = <&vcc3v3_sys>;
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backlight = <&backlight>;
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cmd_later_reset = <0>;
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enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM|MIPI_DSI_MODE_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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// bus-format = <MEDIA_BUS_FMT_RGB666_1X24>;
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dsi,lanes = <4>;
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reset-delay-ms = <20>;
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init-delay-ms = <20>;
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enable-delay-ms = <120>;
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prepare-delay-ms = <120>;
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//for king/rp/rd board cannot enable boot logo
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pinctrl-names = "default";
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pinctrl-0 = <&pwr_en>;
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panel-init-sequence = [
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15 00 02 E0 00
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39 00 02 E1 93
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39 00 02 E2 65
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39 00 02 E3 F8
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39 00 02 E0 00
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39 00 02 70 10
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39 00 02 71 13
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39 00 02 72 06
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39 00 02 80 03
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39 00 02 E0 04
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39 00 02 2D 03
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39 00 02 E0 01
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39 00 02 00 00
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39 00 02 01 A0
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39 00 02 03 00
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39 00 02 04 A0
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39 00 02 17 00
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39 00 02 18 B1
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39 00 02 19 01
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39 00 02 1A 00
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39 00 02 1B B1
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39 00 02 1C 01
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39 00 02 1F 3E
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39 00 02 20 2D
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39 00 02 21 2D
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39 00 02 22 0E
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39 00 02 37 19
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39 00 02 38 05
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39 00 02 39 08
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39 00 02 3A 12
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39 00 02 3C 78
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39 00 02 3E 80
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39 00 02 3F 80
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39 00 02 40 06
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39 00 02 41 A0
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39 00 02 55 01
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39 00 02 56 01
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39 00 02 57 69
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39 00 02 58 0A
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39 00 02 59 0A
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39 00 02 5A 28
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39 00 02 5B 19
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39 00 02 5D 7C
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39 00 02 5E 65
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39 00 02 5F 53
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39 00 02 60 48
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39 00 02 61 43
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39 00 02 62 35
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39 00 02 63 39
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39 00 02 64 23
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39 00 02 65 3D
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39 00 02 66 3C
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39 00 02 67 3D
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39 00 02 68 5A
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39 00 02 69 46
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39 00 02 6A 57
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39 00 02 6B 4B
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39 00 02 6C 49
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39 00 02 6D 2F
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39 00 02 6E 03
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39 00 02 6F 00
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39 00 02 70 7C
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39 00 02 71 65
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39 00 02 72 53
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39 00 02 73 48
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39 00 02 74 43
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39 00 02 75 35
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39 00 02 76 39
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39 00 02 77 23
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39 00 02 78 3D
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39 00 02 79 3C
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39 00 02 7A 3D
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39 00 02 7B 5A
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39 00 02 7C 46
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39 00 02 7D 57
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39 00 02 7E 4B
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39 00 02 7F 49
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39 00 02 80 2F
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39 00 02 81 03
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39 00 02 82 00
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39 00 02 E0 02
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39 00 02 00 47
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39 00 02 01 47
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39 00 02 02 45
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39 00 02 03 45
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39 00 02 04 4B
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39 00 02 05 4B
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39 00 02 06 49
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39 00 02 07 49
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39 00 02 08 41
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39 00 02 09 1F
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39 00 02 0A 1F
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39 00 02 0B 1F
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39 00 02 0C 1F
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39 00 02 0D 1F
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39 00 02 0E 1F
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39 00 02 0F 43
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39 00 02 10 1F
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39 00 02 11 1F
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39 00 02 12 1F
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39 00 02 13 1F
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39 00 02 14 1F
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39 00 02 15 1F
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39 00 02 16 46
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39 00 02 17 46
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39 00 02 18 44
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39 00 02 19 44
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39 00 02 1A 4A
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39 00 02 1B 4A
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39 00 02 1C 48
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39 00 02 1D 48
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39 00 02 1E 40
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39 00 02 1F 1F
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39 00 02 20 1F
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39 00 02 21 1F
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39 00 02 22 1F
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39 00 02 23 1F
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39 00 02 24 1F
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39 00 02 25 42
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39 00 02 26 1F
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39 00 02 27 1F
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39 00 02 28 1F
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39 00 02 29 1F
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39 00 02 2A 1F
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39 00 02 2B 1F
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39 00 02 2C 11
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39 00 02 2D 0F
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39 00 02 2E 0D
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39 00 02 2F 0B
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39 00 02 30 09
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39 00 02 31 07
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39 00 02 32 05
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39 00 02 33 18
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39 00 02 34 17
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39 00 02 35 1F
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39 00 02 36 01
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39 00 02 37 1F
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39 00 02 38 1F
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39 00 02 39 1F
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39 00 02 3A 1F
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39 00 02 3B 1F
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39 00 02 3C 1F
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39 00 02 3D 1F
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39 00 02 3E 1F
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39 00 02 3F 13
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39 00 02 40 1F
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39 00 02 41 1F
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39 00 02 42 10
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39 00 02 43 0E
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39 00 02 44 0C
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39 00 02 45 0A
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39 00 02 46 08
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39 00 02 47 06
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39 00 02 48 04
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39 00 02 49 18
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39 00 02 4A 17
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39 00 02 4B 1F
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39 00 02 4C 00
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39 00 02 4D 1F
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39 00 02 4E 1F
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39 00 02 4F 1F
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39 00 02 50 1F
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39 00 02 51 1F
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39 00 02 52 1F
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39 00 02 53 1F
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39 00 02 54 1F
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39 00 02 55 12
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39 00 02 56 1F
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39 00 02 57 1F
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39 00 02 58 40
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39 00 02 59 00
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39 00 02 5A 00
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39 00 02 5B 30
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39 00 02 5C 03
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39 00 02 5D 30
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|
|
39 00 02 5E 01
|
||
|
|
39 00 02 5F 02
|
||
|
|
39 00 02 60 00
|
||
|
|
39 00 02 61 01
|
||
|
|
39 00 02 62 02
|
||
|
|
39 00 02 63 03
|
||
|
|
39 00 02 64 6B
|
||
|
|
39 00 02 65 00
|
||
|
|
39 00 02 66 00
|
||
|
|
39 00 02 67 73
|
||
|
|
39 00 02 68 05
|
||
|
|
39 00 02 69 06
|
||
|
|
39 00 02 6A 6B
|
||
|
|
39 00 02 6B 08
|
||
|
|
39 00 02 6C 00
|
||
|
|
39 00 02 6D 04
|
||
|
|
39 00 02 6E 04
|
||
|
|
39 00 02 6F 88
|
||
|
|
39 00 02 70 00
|
||
|
|
39 00 02 71 00
|
||
|
|
39 00 02 72 06
|
||
|
|
39 00 02 73 7B
|
||
|
|
39 00 02 74 00
|
||
|
|
39 00 02 75 07
|
||
|
|
39 00 02 76 00
|
||
|
|
39 00 02 77 5D
|
||
|
|
39 00 02 78 17
|
||
|
|
39 00 02 79 1F
|
||
|
|
39 00 02 7A 00
|
||
|
|
39 00 02 7B 00
|
||
|
|
39 00 02 7C 00
|
||
|
|
39 00 02 7D 03
|
||
|
|
39 00 02 7E 7B
|
||
|
|
39 00 02 E0 01
|
||
|
|
39 00 02 0E 01
|
||
|
|
39 00 02 E0 03
|
||
|
|
39 00 02 98 2F
|
||
|
|
39 00 02 E0 04
|
||
|
|
39 00 02 09 10
|
||
|
|
39 00 02 2B 2B
|
||
|
|
39 00 02 2E 44
|
||
|
|
39 00 02 E0 00
|
||
|
|
39 00 02 E6 02
|
||
|
|
39 00 02 E7 02
|
||
|
|
05 78 01 11
|
||
|
|
05 78 01 29
|
||
|
|
];
|
||
|
|
|
||
|
|
panel-exit-sequence = [
|
||
|
|
05 78 01 28
|
||
|
|
05 78 01 10
|
||
|
|
];
|
||
|
|
|
||
|
|
display-timings {
|
||
|
|
native-mode = <&timing0>;
|
||
|
|
timing0: timing0 {
|
||
|
|
clock-frequency = <68000000>;
|
||
|
|
hactive = <800>;
|
||
|
|
vactive = <1280>;
|
||
|
|
hback-porch = <20>;
|
||
|
|
hfront-porch = <32>;
|
||
|
|
vback-porch = <4>;
|
||
|
|
vfront-porch = <8>;
|
||
|
|
hsync-len = <20>;
|
||
|
|
vsync-len = <4>;
|
||
|
|
hsync-active = <0>;
|
||
|
|
vsync-active = <0>;
|
||
|
|
de-active = <0>;
|
||
|
|
pixelclk-active = <0>;
|
||
|
|
};
|
||
|
|
timing1: timing1 {
|
||
|
|
clock-frequency = <148000000>;
|
||
|
|
hactive = <1920>;
|
||
|
|
vactive = <1080>;
|
||
|
|
hback-porch = <100>;
|
||
|
|
hfront-porch = <160>;
|
||
|
|
vback-porch = <25>;
|
||
|
|
vfront-porch = <10>;
|
||
|
|
hsync-len = <20>;
|
||
|
|
vsync-len = <10>;
|
||
|
|
hsync-active = <0>;
|
||
|
|
vsync-active = <0>;
|
||
|
|
de-active = <0>;
|
||
|
|
pixelclk-active = <1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0>;
|
||
|
|
panel_in_dsi: endpoint {
|
||
|
|
remote-endpoint = <&dsi_out_panel>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
};
|
||
|
|
|
||
|
|
ports {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <1>;
|
||
|
|
dsi_out_panel: endpoint {
|
||
|
|
remote-endpoint = <&panel_in_dsi>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&vopb {
|
||
|
|
assigned-clocks = <&cru DCLK_VOP0_DIV>;
|
||
|
|
assigned-clock-parents = <&cru PLL_CPLL>;
|
||
|
|
//assigned-clock-parents = <&cru PLL_VPLL>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&vopb_mmu {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&vopl {
|
||
|
|
assigned-clocks = <&cru DCLK_VOP1_DIV>;
|
||
|
|
assigned-clock-parents = <&cru PLL_VPLL>;
|
||
|
|
//assigned-clock-parents = <&cru PLL_CPLL>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&vopl_mmu {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&dsi_in_vopl {
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&dsi_in_vopb {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&hdmi_in_vopb {
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&hdmi_in_vopl {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&edp_in_vopb {
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&edp_in_vopl {
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&dsi1_in_vopb {
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&dsi1_in_vopl {
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&route_hdmi {
|
||
|
|
status = "okay";
|
||
|
|
connect = <&vopl_out_hdmi>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&route_dsi {
|
||
|
|
status = "okay";
|
||
|
|
connect = <&vopb_out_dsi>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&pinctrl{
|
||
|
|
pwr_5v {
|
||
|
|
pwr_en: pwr-en {
|
||
|
|
rockchip,pins = //<1 13 RK_FUNC_GPIO &pcfg_pull_up>,
|
||
|
|
<4 30 RK_FUNC_GPIO &pcfg_pull_up>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|