#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD





&dsi0 {
    status = "okay";
    rockchip,lane-rate = <940>;
    
    dsi0_panel: panel@0 {
        status = "okay";
        compatible = "simple-panel-dsi";
        reg = <0>;
                reset-delay-ms = <60>;
                init-delay-ms = <60>;
                enable-delay-ms = <120>;
                prepare-delay-ms = <120>;
                dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
                                MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
        dsi,format = <MIPI_DSI_FMT_RGB888>;
        dsi,lanes  = <4>;
        
        /**
         * power-supply = <>;
         * reset-gpios = <>;
         *
         * lcd reset pin and power supply
         * please refer to ***-lcd-gpio.dtsi
         * that included in main dts.
         */

                panel-init-sequence = [
                        05 78 01 11
                        05 78 01 29
                ];

                panel-exit-sequence = [
                        05 78 01 28
                        05 78 01 10
                ];

        
        disp_timings0: display-timings {
            native-mode = <&dsi0_timing0>;
            dsi0_timing0: timing0 {
                                clock-frequency = <148000000>;
                                hactive = <1200>;
                                vactive = <1920>;
                                hback-porch = <60>;
                                hfront-porch = <80>;
                                vback-porch = <25>;
                                vfront-porch = <35>;
                                hsync-len = <1>;
                                vsync-len = <1>;
                                hsync-active = <0>;
                                vsync-active = <0>;
                                de-active = <0>;
                                pixelclk-active = <0>;

            };
        };

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                reg = <0>;
                panel_in_dsi: endpoint {
                    remote-endpoint = <&dsi_out_panel>;
                };
            };
        };
    };

    ports {
        #address-cells = <1>;
        #size-cells = <0>;

        port@1 {
            reg = <1>;
            dsi_out_panel: endpoint {
                remote-endpoint = <&panel_in_dsi>;
            };
        };
    };

};

&dsi0_in_vp0 {
    status = "disabled";
};

&dsi0_in_vp1 {
    status = "okay";
};

&video_phy0 {
    status = "okay";
};

&route_dsi0 {
    status = "okay";
    connect = <&vp1_out_dsi0>;
};


    
&gt9xx {
    status = "okay";
    compatible = "goodix,gt9xx";
    reg = <0x5d>;
    gtp_resolution_x = <1200>;
    gtp_resolution_y = <1920>;
    gtp_int_tarigger = <1>;
    gtp_change_x2y = <0>;
    gtp_overturn_x = <0>;
    gtp_overturn_y = <0>;
    gtp_send_cfg = <1>;
    gtp_touch_wakeup = <1>;

    /**
     * goodix_rst_gpio = <>;
     * goodix_irq_gpio = <>;
     *
     * touch panel interrupt and reset pin
     * please refer to ***-lcd-gpio.dtsi
     * that included in main dts.
     */


	goodix,cfg-group0 = [
                5E B0 04 80 07 05 05 00 01 0F 28 05 
                50 32 03 05 00 00 00 00 00 00 00 00 
                00 00 00 8C 2C 0E 52 54 31 0D 00 00 
                01 80 04 1C 00 00 00 00 00 03 64 32 
                00 00 00 52 66 94 C5 02 07 00 00 04 
                83 53 00 82 57 00 80 5B 00 7F 5F 00 
                7E 63 00 7E 00 00 00 00 00 00 00 00 
                00 00 00 00 00 00 00 00 00 00 00 00 
                00 00 00 00 00 00 00 00 00 00 00 00 
                00 00 00 00 1C 1A 18 16 14 12 10 0E 
                0C 0A 08 06 04 02 FF FF FF FF FF FF 
                FF FF FF FF FF FF FF FF FF FF 00 02 
                04 06 08 0A 0C 0F 10 12 13 14 28 26 
                24 22 21 20 1F 1E 1D 1C 18 16 FF FF 
                FF FF FF FF FF FF FF FF FF FF FF FF 
                FF FF FF FF 22 01
        ];

    goodix,cfg-group2 = [
        00 20 03 00 05 0A 05 00 01 08 28
        05 50 32 03 05 00 00 00 00 00 00
        00 00 00 00 00 8C 2C 0E 17 15 31
        0D 00 00 01 BA 03 1D 00 00 00 00
        00 03 64 32 00 00 00 0F 41 94 C5
        02 07 00 00 04 99 11 00 77 17 00
        5F 1F 00 4C 2A 00 41 38 00 41 00
        00 00 00 00 00 00 00 00 00 00 00
        00 00 00 00 00 00 00 00 00 00 00
        00 00 00 00 00 00 00 00 00 00 00
        00 00 1C 1A 18 16 14 12 10 0E 0C
        0A 08 06 04 02 00 00 00 00 00 00
        00 00 00 00 00 00 00 00 00 00 28
        26 24 22 21 20 1F 1E 1D 1C 18 16
        00 02 04 06 08 0A 0C 0F 10 12 13
        14 FF FF 00 00 00 00 00 00 00 00
        00 00 00 00 00 00 00 00 FE 01

        ];
};

