#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
#define RP_MIPI12LVDS
#define RP_DUALLVDS


&dsi1 {
    status = "okay";
    //rockchip,lane-rate = <480>;

    dsi1_panel: panel@0 {
        status = "okay";
        compatible = "simple-panel-dsi";
        reg = <0>;

        init-delay-ms = <120>;
        reset-delay-ms = <120>;
        enable-delay-ms = <120>;
        prepare-delay-ms = <120>;
        unprepare-delay-ms = <60>;
        disable-delay-ms = <60>;
        dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
                        MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
        dsi,format = <MIPI_DSI_FMT_RGB888>;
        dsi,lanes  = <4>;

        /**
         * power-supply = <>;
         * reset-gpios = <>;
         *
         * lcd reset pin and power supply
         * please refer to ***-lcd-gpio.dtsi
         * that included in main dts.
         */

        panel-init-sequence = [
            23 08 02 27 AA
            23 08 02 48 02
            23 08 02 B6 20
            23 08 02 01 80
            23 08 02 02 38
            23 08 02 03 47
            23 08 02 04 50
            23 08 02 05 12
            23 08 02 06 50
            23 08 02 07 00
            23 08 02 08 18
            23 08 02 09 04
            23 08 02 0A 18
            23 08 02 0B 82
            23 08 02 0C 13
            23 08 02 0D 01
            23 08 02 0E 80
            23 08 02 0F 20
            23 08 02 10 20
            23 08 02 11 03
            23 08 02 12 1B
            23 08 02 13 63
            23 08 02 14 34
            23 08 02 15 20
            23 08 02 16 10
            23 08 02 17 00
            23 08 02 18 34
            23 08 02 19 20
            23 08 02 1A 10
            23 08 02 1B 00
            23 08 02 1E 46
            23 08 02 51 30
            23 08 02 1F 10
            23 08 02 2A 01
            
            05 78 01 11
            05 05 01 29
        ];

        panel-exit-sequence = [
            05 00 01 28
            05 78 01 10
        ];

        disp_timings1: display-timings {
            native-mode = <&dsi1_timing0>;
            dsi1_timing0: timing0 {
                clock-frequency = <130000000>;
                hactive = <1920>;
                vactive = <1080>;
                hback-porch = <80>;
                hfront-porch = <80>;
                vback-porch = <24>;
                vfront-porch = <24>;
                hsync-len = <18>;
                vsync-len = <4>;
                hsync-active = <0>;
                vsync-active = <0>;
                de-active = <0>;
                pixelclk-active = <0>;
            };
        };

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                reg = <0>;
                panel_in_dsi1: endpoint {
                    remote-endpoint = <&dsi1_out_panel>;
                };
            };
        };
    };

    ports {
        #address-cells = <1>;
        #size-cells = <0>;

        port@1 {
            reg = <1>;
            dsi1_out_panel: endpoint {
                remote-endpoint = <&panel_in_dsi1>;
            };
        };
    };
};



&dsi1_in_vp0 {
    status = "disabled";
};

&dsi1_in_vp1 {
    status = "okay";
};



&video_phy1 {
    status = "okay";
};

&video_phy0 {
    status = "disabled";
};

&route_dsi1 {
    status = "okay";
    connect = <&vp1_out_dsi1>;
};


