// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
 *
 */

/dts-v1/;

//rk3568-evb1-ddr4-v10
//#include "rk3568-evb1-ddr4-v10.dtsi"

#include "rk3568-evb-rpdzkj-rk809-pwm.dtsi"


#include "../rk3568-linux.dtsi"

/*************************camera***********************/
#include "rp-mipi-camera-gc2093-rk3568.dtsi"
/***************************************************/


/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/

/*************************gmac***********************/
#include "rp-gmac0-pro-rk3568.dtsi"
/***************************************************/

/*************************CAN**********************/
#include "rp-can1-m1-rk3568.dtsi"
#include "rp-can2-m0-rk3568.dtsi"
/**************************************************/

/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "nano-box-rk3568-lcd-gpio.dtsi"    // if use lcd, must enable it
/* HDMI only */
//#include "rp-lcd-hdmi.dtsi"

/* MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1200-1920.dtsi"

/** LVDS */
//#include"rp-lcd-lvds-10-1280-800.dtsi"
//#include"rp-lcd-lvds-7-1024-600-v2.dtsi"

/* EDP */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"


/************************ MULTILPLE LCD *********************/
/* EDP + MIPI0/LVDS */
//#include "rp-lcd-triple-lvds-7-1024-600-edp-13-1920-1080-hdmi.dtsi"





/{
	model = "nano-box-rk3568";


    fan_gpio_control {
            compatible = "fan_gpio_control";
            gpio-pin = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
            thermal-zone = "soc-thermal";
            threshold-temp = <60000>; //60C
            running-time = <10000>; //10s
            status = "okay";
        };



        rp_power{
                status = "okay";
                compatible = "rp_power";
                rp_not_deep_sleep = <1>;

//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4

                led {    //system led
                        gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
                        gpio_function = <3>;
                };
              //  fan {    //fan
              //          gpio_num = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
              //          gpio_function = <4>;
              //  };
                usb_pwr1 {    //usb host power1
                        gpio_num = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
                        gpio_function = <4>;
                };
                                usb_pwr2 {       //usb host power2
                        gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
                        gpio_function = <4>;
                };

                otg_power {       //usb otg power
                        gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
                        gpio_function = <4>;
                };

                otg_mode {       //OTG SWITCH
                        gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>;
                        gpio_function = <0>;
                };
                spk_enable {       //spk enable
                        gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
                        gpio_function = <4>;
                };
                spk_mute {       //spk mute
                        gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
                        gpio_function = <4>;
                };
        };


        rp_gpio{
                status = "okay";
                compatible = "rp_gpio";

                gpio3b5 {       //gpio
                        gpio_num = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
                        gpio_function = <0>;
                };
                gpio3a7 {       //gpio
                        gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
                        gpio_function = <0>;
                };
  
        };
    
        stm706 {
                status = "okay";
                compatible = "stm706";
                reset_gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
                wdt_gpio = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
        };

        fiq-debugger {
                compatible = "rockchip,fiq-debugger";
                rockchip,serial-id = <2>;
                rockchip,wake-irq = <0>;
                /* If enable uart uses irq instead of fiq */
                rockchip,irq-mode-enable = <1>;
                rockchip,baudrate = <115200>;  /* Only 115200 and 1500000 */
                interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
                pinctrl-names = "default";
                pinctrl-0 = <&uart2m0_xfer>;
                status = "okay";
        };
};


&pmu_io_domains {
        status = "okay";
        pmuio2-supply = <&vcc3v3_pmu>;
        vccio1-supply = <&vccio_acodec>;
        vccio3-supply = <&vccio_sd>;
        vccio4-supply = <&vcc_1v8>;
        vccio5-supply = <&vcc_3v3>;
        vccio6-supply = <&vcc_1v8>;
        vccio7-supply = <&vcc_3v3>;
};

&i2c1 {
    status = "okay";
};


&i2c3 {
    status = "okay";
};


&i2c5 {
    status = "okay";
        rtc@51 {
                status = "okay";
                compatible = "rtc,hym8563";
                reg = <0x51>;
        };
};


&uart0 {
    status = "okay";
};

&uart3 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&uart3m1_xfer>;
};

&uart4 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&uart4m1_xfer>;
};

&uart7 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&uart7m1_xfer>;
};

&uart8 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
};

&uart9 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&uart9m1_xfer>;
};


&spi0 {
    status = "okay";

    spi0_dev@0 {
        compatible = "rockchip,spidev";
        reg = <0>;
        spi-max-frequency = <12000000>;
        spi-lsb-first;
    };
};

&spi1 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;

    spi1_dev@0 {
        compatible = "rockchip,spidev";
        reg = <0>;
        spi-max-frequency = <12000000>;
        spi-lsb-first;
    };

};



&can1 {
       assigned-clocks = <&cru CLK_CAN1>;
       assigned-clock-rates = <150000000>;
       pinctrl-names = "default";
       pinctrl-0 = <&can1m1_pins>;
       status = "okay";
};


&can2 {
        assigned-clocks = <&cru CLK_CAN2>;
        assigned-clock-rates = <150000000>;
        pinctrl-names = "default";
        pinctrl-0 = <&can2m0_pins>;
        status = "okay";
};

/******** must be close,if not system no run ******/
&dmc {
       status = "disabled";
};

&dfi {
       status = "disabled";
};


&pwm7 {
    /****** disable for gpio used to be spi0_cs0 */
    status = "disabled";
};


/*************************wifi bt***********************/
&wireless_wlan {
    pinctrl-names = "default";
    pinctrl-0 = <&wifi_host_wake_irq>;
    WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
&wireless_bluetooth {
    BT,reset_gpio    = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
    BT,wake_gpio     = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
      BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
    status = "okay";
};

/******************************************************/


&rk_headset {
    status = "disabled";
};
&edp {
    /** delete hdp gpio that nano-box-rk3568 donot use */
    /delete-property/ hpd-gpios;
};

&pinctrl {
    wireless-wlan {
        wifi_host_wake_irq: wifi-host-wake-irq {
            rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
        };
    };

    wireless-bluetooth {
        uart8_gpios: uart8-gpios {
            rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
        };
    };
};    
