// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
 */

#include <dt-bindings/soc/rockchip-amp.h>

/ {
	rockchip_amp: rockchip-amp {
		compatible = "rockchip,amp";
		clocks = <&cru HCLK_PMU_CM0_ROOT>, <&cru FCLK_PMU_CM0_CORE>,
			<&cru CLK_PMU_CM0_RTC>, <&cru PCLK_PMUCM0_INTMUX>,
			<&cru SCLK_UART5>, <&cru PCLK_UART5>,
			<&cru PCLK_BUSTIMER0>, <&cru CLK_BUSTIMER4>, <&cru CLK_BUSTIMER5>,
			<&cru PCLK_BUSTIMER1>, <&cru CLK_BUSTIMER10>, <&cru CLK_BUSTIMER11>;

		pinctrl-names = "default";
		pinctrl-0 = <&uart5m0_xfer>;

		status = "okay";
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		/* remote amp core address */
		amp_shmem_reserved: amp-shmem@7800000 {
			reg = <0x0 0x7800000 0x0 0x400000>;
			no-map;
		};

		rpmsg_reserved: rpmsg@7c00000 {
			reg = <0x0 0x07c00000 0x0 0x400000>;
			no-map;
		};

		rpmsg_dma_reserved: rpmsg-dma@8000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x08000000 0x0 0x100000>;
			no-map;
		};

		/* mcu address */
		mcu_reserved: mcu@8200000 {
			reg = <0x0 0x8200000 0x0 0x100000>;
			no-map;
		};
	};

	rpmsg: rpmsg@7c00000 {
		compatible = "rockchip,rpmsg";
		mbox-names = "rpmsg-rx", "rpmsg-tx";
		mboxes = <&mailbox0 0 &mailbox0 3>;
		rockchip,vdev-nums = <1>;
		rockchip,link-id = <0x03>;
		reg = <0x0 0x7c00000 0x0 0x20000>;
		memory-region = <&rpmsg_dma_reserved>;

		status = "okay";
	};
};

&mailbox0 {
	rockchip,txpoll-period-ms = <1>;
	status = "okay";
};
