EMS，硬件设计文件以及软件功能验证程序

1.Software/Verify/simulink/fuc_ert_rtw/ert_main.c

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+/*
+ * File: ert_main.c
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include <stddef.h>
+#include <stdio.h>            /* This example main program uses printf/fflush */
+#include "fuc.h"                       /* Model header file */
+
+/*
+ * Associating rt_OneStep with a real-time clock or interrupt service routine
+ * is what makes the generated code "real-time".  The function rt_OneStep is
+ * always associated with the base rate of the model.  Subrates are managed
+ * by the base rate from inside the generated code.  Enabling/disabling
+ * interrupts and floating point context switches are target specific.  This
+ * example code indicates where these should take place relative to executing
+ * the generated code step function.  Overrun behavior should be tailored to
+ * your application needs.  This example simply sets an error status in the
+ * real-time model and returns from rt_OneStep.
+ */
+void rt_OneStep(void);
+void rt_OneStep(void)
+{
+  static boolean_T OverrunFlag = false;
+
+  /* Disable interrupts here */
+
+  /* Check for overrun */
+  if (OverrunFlag) {
+    rtmSetErrorStatus(fuc_M, "Overrun");
+    return;
+  }
+
+  OverrunFlag = true;
+
+  /* Save FPU context here (if necessary) */
+  /* Re-enable timer or interrupt here */
+  /* Set model inputs here */
+
+  /* Step the model */
+  fuc_step();
+
+  /* Get model outputs here */
+
+  /* Indicate task complete */
+  OverrunFlag = false;
+
+  /* Disable interrupts here */
+  /* Restore FPU context here (if necessary) */
+  /* Enable interrupts here */
+}
+
+/*
+ * The example main function illustrates what is required by your
+ * application code to initialize, execute, and terminate the generated code.
+ * Attaching rt_OneStep to a real-time clock is target specific. This example
+ * illustrates how you do this relative to initializing the model.
+ */
+int_T main(int_T argc, const char *argv[])
+{
+  /* Unused arguments */
+  (void)(argc);
+  (void)(argv);
+
+  /* Initialize model */
+  fuc_initialize();
+
+  /* Simulating the model step behavior (in non real-time) to
+   *  simulate model behavior at stop time.
+   */
+  while ((rtmGetErrorStatus(fuc_M) == (NULL)) && !rtmGetStopRequested(fuc_M)) {
+    rt_OneStep();
+  }
+
+  /* Terminate model */
+  fuc_terminate();
+  return 0;
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

1.Software/Verify/simulink/fuc_ert_rtw/fuc.c

@@ -0,0 +1,328 @@
+/*
+ * File: fuc.c
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "fuc.h"
+#include "rtwtypes.h"
+#include <math.h>
+#include "fuc_private.h"
+#include "rt_nonfinite.h"
+
+/* Block signals (default storage) */
+B_fuc_T fuc_B;
+
+/* Continuous states */
+X_fuc_T fuc_X;
+
+/* Real-time model */
+static RT_MODEL_fuc_T fuc_M_;
+RT_MODEL_fuc_T *const fuc_M = &fuc_M_;
+
+/*
+ * This function updates continuous states using the ODE3 fixed-step
+ * solver algorithm
+ */
+static void rt_ertODEUpdateContinuousStates(RTWSolverInfo *si )
+{
+  /* Solver Matrices */
+  static const real_T rt_ODE3_A[3] = {
+    1.0/2.0, 3.0/4.0, 1.0
+  };
+
+  static const real_T rt_ODE3_B[3][3] = {
+    { 1.0/2.0, 0.0, 0.0 },
+
+    { 0.0, 3.0/4.0, 0.0 },
+
+    { 2.0/9.0, 1.0/3.0, 4.0/9.0 }
+  };
+
+  time_T t = rtsiGetT(si);
+  time_T tnew = rtsiGetSolverStopTime(si);
+  time_T h = rtsiGetStepSize(si);
+  real_T *x = rtsiGetContStates(si);
+  ODE3_IntgData *id = (ODE3_IntgData *)rtsiGetSolverData(si);
+  real_T *y = id->y;
+  real_T *f0 = id->f[0];
+  real_T *f1 = id->f[1];
+  real_T *f2 = id->f[2];
+  real_T hB[3];
+  int_T i;
+  int_T nXc = 3;
+  rtsiSetSimTimeStep(si,MINOR_TIME_STEP);
+
+  /* Save the state values at time t in y, we'll use x as ynew. */
+  (void) memcpy(y, x,
+                (uint_T)nXc*sizeof(real_T));
+
+  /* Assumes that rtsiSetT and ModelOutputs are up-to-date */
+  /* f0 = f(t,y) */
+  rtsiSetdX(si, f0);
+  fuc_derivatives();
+
+  /* f(:,2) = feval(odefile, t + hA(1), y + f*hB(:,1), args(:)(*)); */
+  hB[0] = h * rt_ODE3_B[0][0];
+  for (i = 0; i < nXc; i++) {
+    x[i] = y[i] + (f0[i]*hB[0]);
+  }
+
+  rtsiSetT(si, t + h*rt_ODE3_A[0]);
+  rtsiSetdX(si, f1);
+  fuc_step();
+  fuc_derivatives();
+
+  /* f(:,3) = feval(odefile, t + hA(2), y + f*hB(:,2), args(:)(*)); */
+  for (i = 0; i <= 1; i++) {
+    hB[i] = h * rt_ODE3_B[1][i];
+  }
+
+  for (i = 0; i < nXc; i++) {
+    x[i] = y[i] + (f0[i]*hB[0] + f1[i]*hB[1]);
+  }
+
+  rtsiSetT(si, t + h*rt_ODE3_A[1]);
+  rtsiSetdX(si, f2);
+  fuc_step();
+  fuc_derivatives();
+
+  /* tnew = t + hA(3);
+     ynew = y + f*hB(:,3); */
+  for (i = 0; i <= 2; i++) {
+    hB[i] = h * rt_ODE3_B[2][i];
+  }
+
+  for (i = 0; i < nXc; i++) {
+    x[i] = y[i] + (f0[i]*hB[0] + f1[i]*hB[1] + f2[i]*hB[2]);
+  }
+
+  rtsiSetT(si, tnew);
+  rtsiSetSimTimeStep(si,MAJOR_TIME_STEP);
+}
+
+real_T rt_powd_snf(real_T u0, real_T u1)
+{
+  real_T y;
+  if (rtIsNaN(u0) || rtIsNaN(u1)) {
+    y = (rtNaN);
+  } else {
+    real_T tmp;
+    real_T tmp_0;
+    tmp = fabs(u0);
+    tmp_0 = fabs(u1);
+    if (rtIsInf(u1)) {
+      if (tmp == 1.0) {
+        y = 1.0;
+      } else if (tmp > 1.0) {
+        if (u1 > 0.0) {
+          y = (rtInf);
+        } else {
+          y = 0.0;
+        }
+      } else if (u1 > 0.0) {
+        y = 0.0;
+      } else {
+        y = (rtInf);
+      }
+    } else if (tmp_0 == 0.0) {
+      y = 1.0;
+    } else if (tmp_0 == 1.0) {
+      if (u1 > 0.0) {
+        y = u0;
+      } else {
+        y = 1.0 / u0;
+      }
+    } else if (u1 == 2.0) {
+      y = u0 * u0;
+    } else if ((u1 == 0.5) && (u0 >= 0.0)) {
+      y = sqrt(u0);
+    } else if ((u0 < 0.0) && (u1 > floor(u1))) {
+      y = (rtNaN);
+    } else {
+      y = pow(u0, u1);
+    }
+  }
+
+  return y;
+}
+
+/* Model step function */
+void fuc_step(void)
+{
+  real_T rtb_Sum;
+  real_T rtb_Sum_tmp;
+  real_T rtb_y;
+  real_T rtb_y_c;
+  real_T y_j_tmp;
+  if (rtmIsMajorTimeStep(fuc_M)) {
+    /* set solver stop time */
+    rtsiSetSolverStopTime(&fuc_M->solverInfo,((fuc_M->Timing.clockTick0+1)*
+      fuc_M->Timing.stepSize0));
+  }                                    /* end MajorTimeStep */
+
+  /* Update absolute time of base rate at minor time step */
+  if (rtmIsMinorTimeStep(fuc_M)) {
+    fuc_M->Timing.t[0] = rtsiGetT(&fuc_M->solverInfo);
+  }
+
+  /* Clock: '<S2>/t' */
+  rtb_y = fuc_M->Timing.t[0];
+
+  /* MATLAB Function: '<S2>/sint' incorporates:
+   *  Clock: '<S2>/t'
+   *  MATLAB Function: '<S2>/ddsint'
+   *  SignalConversion generated from: '<S8>/ SFunction '
+   */
+  rtb_Sum_tmp = sin(0.20943951023931953 * rtb_y);
+
+  /* Sum: '<Root>/Sum' incorporates:
+   *  Integrator: '<Root>/sys'
+   *  MATLAB Function: '<S2>/sint'
+   *  SignalConversion generated from: '<S8>/ SFunction '
+   */
+  rtb_Sum = rtb_Sum_tmp * 0.0 - fuc_X.sys_CSTATE;
+
+  /* MATLAB Function: '<S2>/dsint' incorporates:
+   *  Clock: '<S2>/t'
+   *  SignalConversion generated from: '<S7>/ SFunction '
+   */
+  rtb_y_c = cos(0.20943951023931953 * rtb_y) * 0.0;
+
+  /* Integrator: '<Root>/Integrator' */
+  fuc_B.x2 = fuc_X.Integrator_CSTATE;
+
+  /* MATLAB Function: '<Root>/u(2)+u(1)*u(3)-u(4)' incorporates:
+   *  SignalConversion generated from: '<S5>/ SFunction '
+   */
+  rtb_y = (rtb_y_c + rtb_Sum) - fuc_B.x2;
+
+  /* MATLAB Function: '<Root>/u' incorporates:
+   *  Integrator: '<Root>/sys'
+   *  MATLAB Function: '<Root>/-u(3)//u(2)*u(1)^3+u(4)//u(2)'
+   *  MATLAB Function: '<Root>/u(1)//u(3)*u(2)^3'
+   */
+  y_j_tmp = rt_powd_snf(fuc_X.sys_CSTATE, 3.0);
+
+  /* MATLAB Function: '<Root>/-u(3)//u(2)*u(1)^3+u(4)//u(2)' incorporates:
+   *  Integrator: '<Root>/Integrator1'
+   *  MATLAB Function: '<Root>/u'
+   *  MATLAB Function: '<S2>/ddsint'
+   *  SignalConversion generated from: '<S3>/ SFunction '
+   *  SignalConversion generated from: '<S6>/ SFunction '
+   */
+  fuc_B.y_j = ((((rtb_Sum_tmp * -0.0 + rtb_Sum) + (rtb_y_c - fuc_B.x2)) +
+                fuc_X.Integrator1_CSTATE * y_j_tmp) + rtb_y) - y_j_tmp;
+
+  /* MATLAB Function: '<Root>/u(1)//u(3)*u(2)^3' incorporates:
+   *  SignalConversion generated from: '<S4>/ SFunction '
+   */
+  fuc_B.y = rtb_y * y_j_tmp;
+  if (rtmIsMajorTimeStep(fuc_M)) {
+    rt_ertODEUpdateContinuousStates(&fuc_M->solverInfo);
+
+    /* Update absolute time for base rate */
+    /* The "clockTick0" counts the number of times the code of this task has
+     * been executed. The absolute time is the multiplication of "clockTick0"
+     * and "Timing.stepSize0". Size of "clockTick0" ensures timer will not
+     * overflow during the application lifespan selected.
+     */
+    ++fuc_M->Timing.clockTick0;
+    fuc_M->Timing.t[0] = rtsiGetSolverStopTime(&fuc_M->solverInfo);
+
+    {
+      /* Update absolute timer for sample time: [10.0s, 0.0s] */
+      /* The "clockTick1" counts the number of times the code of this task has
+       * been executed. The resolution of this integer timer is 10.0, which is the step size
+       * of the task. Size of "clockTick1" ensures timer will not overflow during the
+       * application lifespan selected.
+       */
+      fuc_M->Timing.clockTick1++;
+    }
+  }                                    /* end MajorTimeStep */
+}
+
+/* Derivatives for root system: '<Root>' */
+void fuc_derivatives(void)
+{
+  XDot_fuc_T *_rtXdot;
+  _rtXdot = ((XDot_fuc_T *) fuc_M->derivs);
+
+  /* Derivatives for Integrator: '<Root>/sys' */
+  _rtXdot->sys_CSTATE = fuc_B.x2;
+
+  /* Derivatives for Integrator: '<Root>/Integrator' */
+  _rtXdot->Integrator_CSTATE = fuc_B.y_j;
+
+  /* Derivatives for Integrator: '<Root>/Integrator1' */
+  _rtXdot->Integrator1_CSTATE = fuc_B.y;
+}
+
+/* Model initialize function */
+void fuc_initialize(void)
+{
+  /* Registration code */
+
+  /* initialize non-finites */
+  rt_InitInfAndNaN(sizeof(real_T));
+
+  {
+    /* Setup solver object */
+    rtsiSetSimTimeStepPtr(&fuc_M->solverInfo, &fuc_M->Timing.simTimeStep);
+    rtsiSetTPtr(&fuc_M->solverInfo, &rtmGetTPtr(fuc_M));
+    rtsiSetStepSizePtr(&fuc_M->solverInfo, &fuc_M->Timing.stepSize0);
+    rtsiSetdXPtr(&fuc_M->solverInfo, &fuc_M->derivs);
+    rtsiSetContStatesPtr(&fuc_M->solverInfo, (real_T **) &fuc_M->contStates);
+    rtsiSetNumContStatesPtr(&fuc_M->solverInfo, &fuc_M->Sizes.numContStates);
+    rtsiSetNumPeriodicContStatesPtr(&fuc_M->solverInfo,
+      &fuc_M->Sizes.numPeriodicContStates);
+    rtsiSetPeriodicContStateIndicesPtr(&fuc_M->solverInfo,
+      &fuc_M->periodicContStateIndices);
+    rtsiSetPeriodicContStateRangesPtr(&fuc_M->solverInfo,
+      &fuc_M->periodicContStateRanges);
+    rtsiSetErrorStatusPtr(&fuc_M->solverInfo, (&rtmGetErrorStatus(fuc_M)));
+    rtsiSetRTModelPtr(&fuc_M->solverInfo, fuc_M);
+  }
+
+  rtsiSetSimTimeStep(&fuc_M->solverInfo, MAJOR_TIME_STEP);
+  fuc_M->intgData.y = fuc_M->odeY;
+  fuc_M->intgData.f[0] = fuc_M->odeF[0];
+  fuc_M->intgData.f[1] = fuc_M->odeF[1];
+  fuc_M->intgData.f[2] = fuc_M->odeF[2];
+  fuc_M->contStates = ((X_fuc_T *) &fuc_X);
+  rtsiSetSolverData(&fuc_M->solverInfo, (void *)&fuc_M->intgData);
+  rtsiSetIsMinorTimeStepWithModeChange(&fuc_M->solverInfo, false);
+  rtsiSetSolverName(&fuc_M->solverInfo,"ode3");
+  rtmSetTPtr(fuc_M, &fuc_M->Timing.tArray[0]);
+  fuc_M->Timing.stepSize0 = 10.0;
+
+  /* InitializeConditions for Integrator: '<Root>/sys' */
+  fuc_X.sys_CSTATE = 0.0;
+
+  /* InitializeConditions for Integrator: '<Root>/Integrator' */
+  fuc_X.Integrator_CSTATE = 0.0;
+
+  /* InitializeConditions for Integrator: '<Root>/Integrator1' */
+  fuc_X.Integrator1_CSTATE = 0.0;
+}
+
+/* Model terminate function */
+void fuc_terminate(void)
+{
+  /* (no terminate code required) */
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

1.Software/Verify/simulink/fuc_ert_rtw/fuc.h

@@ -0,0 +1,191 @@
+/*
+ * File: fuc.h
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef RTW_HEADER_fuc_h_
+#define RTW_HEADER_fuc_h_
+#ifndef fuc_COMMON_INCLUDES_
+#define fuc_COMMON_INCLUDES_
+#include "rtwtypes.h"
+#include "rtw_continuous.h"
+#include "rtw_solver.h"
+#endif                                 /* fuc_COMMON_INCLUDES_ */
+
+#include "fuc_types.h"
+#include <string.h>
+#include "rt_nonfinite.h"
+
+/* Macros for accessing real-time model data structure */
+#ifndef rtmGetErrorStatus
+#define rtmGetErrorStatus(rtm)         ((rtm)->errorStatus)
+#endif
+
+#ifndef rtmSetErrorStatus
+#define rtmSetErrorStatus(rtm, val)    ((rtm)->errorStatus = (val))
+#endif
+
+#ifndef rtmGetStopRequested
+#define rtmGetStopRequested(rtm)       ((rtm)->Timing.stopRequestedFlag)
+#endif
+
+#ifndef rtmSetStopRequested
+#define rtmSetStopRequested(rtm, val)  ((rtm)->Timing.stopRequestedFlag = (val))
+#endif
+
+#ifndef rtmGetStopRequestedPtr
+#define rtmGetStopRequestedPtr(rtm)    (&((rtm)->Timing.stopRequestedFlag))
+#endif
+
+#ifndef rtmGetT
+#define rtmGetT(rtm)                   (rtmGetTPtr((rtm))[0])
+#endif
+
+#ifndef rtmGetTPtr
+#define rtmGetTPtr(rtm)                ((rtm)->Timing.t)
+#endif
+
+/* Block signals (default storage) */
+typedef struct {
+  real_T x2;                           /* '<Root>/Integrator' */
+  real_T y;                            /* '<Root>/u(1)//u(3)*u(2)^3' */
+  real_T y_j;                       /* '<Root>/-u(3)//u(2)*u(1)^3+u(4)//u(2)' */
+} B_fuc_T;
+
+/* Continuous states (default storage) */
+typedef struct {
+  real_T sys_CSTATE;                   /* '<Root>/sys' */
+  real_T Integrator_CSTATE;            /* '<Root>/Integrator' */
+  real_T Integrator1_CSTATE;           /* '<Root>/Integrator1' */
+} X_fuc_T;
+
+/* State derivatives (default storage) */
+typedef struct {
+  real_T sys_CSTATE;                   /* '<Root>/sys' */
+  real_T Integrator_CSTATE;            /* '<Root>/Integrator' */
+  real_T Integrator1_CSTATE;           /* '<Root>/Integrator1' */
+} XDot_fuc_T;
+
+/* State disabled  */
+typedef struct {
+  boolean_T sys_CSTATE;                /* '<Root>/sys' */
+  boolean_T Integrator_CSTATE;         /* '<Root>/Integrator' */
+  boolean_T Integrator1_CSTATE;        /* '<Root>/Integrator1' */
+} XDis_fuc_T;
+
+#ifndef ODE3_INTG
+#define ODE3_INTG
+
+/* ODE3 Integration Data */
+typedef struct {
+  real_T *y;                           /* output */
+  real_T *f[3];                        /* derivatives */
+} ODE3_IntgData;
+
+#endif
+
+/* Real-time Model Data Structure */
+struct tag_RTM_fuc_T {
+  const char_T *errorStatus;
+  RTWSolverInfo solverInfo;
+  X_fuc_T *contStates;
+  int_T *periodicContStateIndices;
+  real_T *periodicContStateRanges;
+  real_T *derivs;
+  XDis_fuc_T *contStateDisabled;
+  boolean_T zCCacheNeedsReset;
+  boolean_T derivCacheNeedsReset;
+  boolean_T CTOutputIncnstWithState;
+  real_T odeY[3];
+  real_T odeF[3][3];
+  ODE3_IntgData intgData;
+
+  /*
+   * Sizes:
+   * The following substructure contains sizes information
+   * for many of the model attributes such as inputs, outputs,
+   * dwork, sample times, etc.
+   */
+  struct {
+    int_T numContStates;
+    int_T numPeriodicContStates;
+    int_T numSampTimes;
+  } Sizes;
+
+  /*
+   * Timing:
+   * The following substructure contains information regarding
+   * the timing information for the model.
+   */
+  struct {
+    uint16_T clockTick0;
+    time_T stepSize0;
+    uint16_T clockTick1;
+    SimTimeStep simTimeStep;
+    boolean_T stopRequestedFlag;
+    time_T *t;
+    time_T tArray[2];
+  } Timing;
+};
+
+/* Block signals (default storage) */
+extern B_fuc_T fuc_B;
+
+/* Continuous states (default storage) */
+extern X_fuc_T fuc_X;
+
+/* Model entry point functions */
+extern void fuc_initialize(void);
+extern void fuc_step(void);
+extern void fuc_terminate(void);
+
+/* Real-time Model object */
+extern RT_MODEL_fuc_T *const fuc_M;
+
+/*-
+ * These blocks were eliminated from the model due to optimizations:
+ *
+ * Block '<Root>/Scope' : Unused code path elimination
+ */
+
+/*-
+ * The generated code includes comments that allow you to trace directly
+ * back to the appropriate location in the model.  The basic format
+ * is <system>/block_name, where system is the system number (uniquely
+ * assigned by Simulink) and block_name is the name of the block.
+ *
+ * Use the MATLAB hilite_system command to trace the generated code back
+ * to the model.  For example,
+ *
+ * hilite_system('<S3>')    - opens system 3
+ * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
+ *
+ * Here is the system hierarchy for this model
+ *
+ * '<Root>' : 'fuc'
+ * '<S1>'   : 'fuc/-u(3)//u(2)*u(1)^3+u(4)//u(2)'
+ * '<S2>'   : 'fuc/Subsystem'
+ * '<S3>'   : 'fuc/u'
+ * '<S4>'   : 'fuc/u(1)//u(3)*u(2)^3'
+ * '<S5>'   : 'fuc/u(2)+u(1)*u(3)-u(4)'
+ * '<S6>'   : 'fuc/Subsystem/ddsint'
+ * '<S7>'   : 'fuc/Subsystem/dsint'
+ * '<S8>'   : 'fuc/Subsystem/sint'
+ */
+#endif                                 /* RTW_HEADER_fuc_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

1.Software/Verify/simulink/fuc_ert_rtw/fuc_private.h

@@ -0,0 +1,45 @@
+/*
+ * File: fuc_private.h
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef RTW_HEADER_fuc_private_h_
+#define RTW_HEADER_fuc_private_h_
+#include "rtwtypes.h"
+#include "fuc_types.h"
+
+/* Private macros used by the generated code to access rtModel */
+#ifndef rtmIsMajorTimeStep
+#define rtmIsMajorTimeStep(rtm)        (((rtm)->Timing.simTimeStep) == MAJOR_TIME_STEP)
+#endif
+
+#ifndef rtmIsMinorTimeStep
+#define rtmIsMinorTimeStep(rtm)        (((rtm)->Timing.simTimeStep) == MINOR_TIME_STEP)
+#endif
+
+#ifndef rtmSetTPtr
+#define rtmSetTPtr(rtm, val)           ((rtm)->Timing.t = (val))
+#endif
+
+extern real_T rt_powd_snf(real_T u0, real_T u1);
+
+/* private model entry point functions */
+extern void fuc_derivatives(void);
+
+#endif                                 /* RTW_HEADER_fuc_private_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

1.Software/Verify/simulink/fuc_ert_rtw/fuc_types.h

@@ -0,0 +1,28 @@
+/*
+ * File: fuc_types.h
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef RTW_HEADER_fuc_types_h_
+#define RTW_HEADER_fuc_types_h_
+
+/* Forward declaration for rtModel */
+typedef struct tag_RTM_fuc_T RT_MODEL_fuc_T;
+
+#endif                                 /* RTW_HEADER_fuc_types_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

1.Software/Verify/simulink/fuc_ert_rtw/rtGetInf.c

@@ -0,0 +1,96 @@
+/*
+ * File: rtGetInf.c
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "rtwtypes.h"
+#include "rtGetInf.h"
+#include <stddef.h>
+#include "rt_nonfinite.h"
+#define NumBitsPerChar                 8U
+
+/*
+ * Initialize rtInf needed by the generated code.
+ * Inf is initialized as non-signaling. Assumes IEEE.
+ */
+real_T rtGetInf(void)
+{
+  size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar);
+  real_T inf = 0.0;
+  if (bitsPerReal == 32U) {
+    inf = rtGetInfF();
+  } else {
+    union {
+      LittleEndianIEEEDouble bitVal;
+      real_T fltVal;
+    } tmpVal;
+
+    tmpVal.bitVal.words.wordH = 0x7FF00000U;
+    tmpVal.bitVal.words.wordL = 0x00000000U;
+    inf = tmpVal.fltVal;
+  }
+
+  return inf;
+}
+
+/*
+ * Initialize rtInfF needed by the generated code.
+ * Inf is initialized as non-signaling. Assumes IEEE.
+ */
+real32_T rtGetInfF(void)
+{
+  IEEESingle infF;
+  infF.wordL.wordLuint = 0x7F800000U;
+  return infF.wordL.wordLreal;
+}
+
+/*
+ * Initialize rtMinusInf needed by the generated code.
+ * Inf is initialized as non-signaling. Assumes IEEE.
+ */
+real_T rtGetMinusInf(void)
+{
+  size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar);
+  real_T minf = 0.0;
+  if (bitsPerReal == 32U) {
+    minf = rtGetMinusInfF();
+  } else {
+    union {
+      LittleEndianIEEEDouble bitVal;
+      real_T fltVal;
+    } tmpVal;
+
+    tmpVal.bitVal.words.wordH = 0xFFF00000U;
+    tmpVal.bitVal.words.wordL = 0x00000000U;
+    minf = tmpVal.fltVal;
+  }
+
+  return minf;
+}
+
+/*
+ * Initialize rtMinusInfF needed by the generated code.
+ * Inf is initialized as non-signaling. Assumes IEEE.
+ */
+real32_T rtGetMinusInfF(void)
+{
+  IEEESingle minfF;
+  minfF.wordL.wordLuint = 0xFF800000U;
+  return minfF.wordL.wordLreal;
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

1.Software/Verify/simulink/fuc_ert_rtw/rtGetInf.h

@@ -0,0 +1,31 @@
+/*
+ * File: rtGetInf.h
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef RTW_HEADER_rtGetInf_h_
+#define RTW_HEADER_rtGetInf_h_
+#include "rtwtypes.h"
+
+extern real_T rtGetInf(void);
+extern real32_T rtGetInfF(void);
+extern real_T rtGetMinusInf(void);
+extern real32_T rtGetMinusInfF(void);
+
+#endif                                 /* RTW_HEADER_rtGetInf_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

1.Software/Verify/simulink/fuc_ert_rtw/rtGetNaN.c

@@ -0,0 +1,62 @@
+/*
+ * File: rtGetNaN.c
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "rtwtypes.h"
+#include "rtGetNaN.h"
+#include <stddef.h>
+#include "rt_nonfinite.h"
+#define NumBitsPerChar                 8U
+
+/*
+ * Initialize rtNaN needed by the generated code.
+ * NaN is initialized as non-signaling. Assumes IEEE.
+ */
+real_T rtGetNaN(void)
+{
+  size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar);
+  real_T nan = 0.0;
+  if (bitsPerReal == 32U) {
+    nan = rtGetNaNF();
+  } else {
+    union {
+      LittleEndianIEEEDouble bitVal;
+      real_T fltVal;
+    } tmpVal;
+
+    tmpVal.bitVal.words.wordH = 0xFFF80000U;
+    tmpVal.bitVal.words.wordL = 0x00000000U;
+    nan = tmpVal.fltVal;
+  }
+
+  return nan;
+}
+
+/*
+ * Initialize rtNaNF needed by the generated code.
+ * NaN is initialized as non-signaling. Assumes IEEE.
+ */
+real32_T rtGetNaNF(void)
+{
+  IEEESingle nanF = { { 0.0F } };
+
+  nanF.wordL.wordLuint = 0xFFC00000U;
+  return nanF.wordL.wordLreal;
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

1.Software/Verify/simulink/fuc_ert_rtw/rtGetNaN.h

@@ -0,0 +1,29 @@
+/*
+ * File: rtGetNaN.h
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef RTW_HEADER_rtGetNaN_h_
+#define RTW_HEADER_rtGetNaN_h_
+#include "rtwtypes.h"
+
+extern real_T rtGetNaN(void);
+extern real32_T rtGetNaNF(void);
+
+#endif                                 /* RTW_HEADER_rtGetNaN_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

1.Software/Verify/simulink/fuc_ert_rtw/rt_nonfinite.c

@@ -0,0 +1,92 @@
+/*
+ * File: rt_nonfinite.c
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#include "rtGetNaN.h"
+#include "rtGetInf.h"
+#include <stddef.h>
+#include "rtwtypes.h"
+#include "rt_nonfinite.h"
+#define NumBitsPerChar                 8U
+
+real_T rtInf;
+real_T rtMinusInf;
+real_T rtNaN;
+real32_T rtInfF;
+real32_T rtMinusInfF;
+real32_T rtNaNF;
+
+/*
+ * Initialize the rtInf, rtMinusInf, and rtNaN needed by the
+ * generated code. NaN is initialized as non-signaling. Assumes IEEE.
+ */
+void rt_InitInfAndNaN(size_t realSize)
+{
+  (void) (realSize);
+  rtNaN = rtGetNaN();
+  rtNaNF = rtGetNaNF();
+  rtInf = rtGetInf();
+  rtInfF = rtGetInfF();
+  rtMinusInf = rtGetMinusInf();
+  rtMinusInfF = rtGetMinusInfF();
+}
+
+/* Test if value is infinite */
+boolean_T rtIsInf(real_T value)
+{
+  return (boolean_T)((value==rtInf || value==rtMinusInf) ? 1U : 0U);
+}
+
+/* Test if single-precision value is infinite */
+boolean_T rtIsInfF(real32_T value)
+{
+  return (boolean_T)(((value)==rtInfF || (value)==rtMinusInfF) ? 1U : 0U);
+}
+
+/* Test if value is not a number */
+boolean_T rtIsNaN(real_T value)
+{
+  boolean_T result = (boolean_T) 0;
+  size_t bitsPerReal = sizeof(real_T) * (NumBitsPerChar);
+  if (bitsPerReal == 32U) {
+    result = rtIsNaNF((real32_T)value);
+  } else {
+    union {
+      LittleEndianIEEEDouble bitVal;
+      real_T fltVal;
+    } tmpVal;
+
+    tmpVal.fltVal = value;
+    result = (boolean_T)((tmpVal.bitVal.words.wordH & 0x7FF00000) == 0x7FF00000 &&
+                         ( (tmpVal.bitVal.words.wordH & 0x000FFFFF) != 0 ||
+                          (tmpVal.bitVal.words.wordL != 0) ));
+  }
+
+  return result;
+}
+
+/* Test if single-precision value is not a number */
+boolean_T rtIsNaNF(real32_T value)
+{
+  IEEESingle tmp;
+  tmp.wordL.wordLreal = value;
+  return (boolean_T)( (tmp.wordL.wordLuint & 0x7F800000) == 0x7F800000 &&
+                     (tmp.wordL.wordLuint & 0x007FFFFF) != 0 );
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

1.Software/Verify/simulink/fuc_ert_rtw/rt_nonfinite.h

@@ -0,0 +1,60 @@
+/*
+ * File: rt_nonfinite.h
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef RTW_HEADER_rt_nonfinite_h_
+#define RTW_HEADER_rt_nonfinite_h_
+#include <stddef.h>
+#include "rtwtypes.h"
+#define NOT_USING_NONFINITE_LITERALS   1
+
+extern real_T rtInf;
+extern real_T rtMinusInf;
+extern real_T rtNaN;
+extern real32_T rtInfF;
+extern real32_T rtMinusInfF;
+extern real32_T rtNaNF;
+extern void rt_InitInfAndNaN(size_t realSize);
+extern boolean_T rtIsInf(real_T value);
+extern boolean_T rtIsInfF(real32_T value);
+extern boolean_T rtIsNaN(real_T value);
+extern boolean_T rtIsNaNF(real32_T value);
+typedef struct {
+  struct {
+    uint32_T wordH;
+    uint32_T wordL;
+  } words;
+} BigEndianIEEEDouble;
+
+typedef struct {
+  struct {
+    uint32_T wordL;
+    uint32_T wordH;
+  } words;
+} LittleEndianIEEEDouble;
+
+typedef struct {
+  union {
+    real32_T wordLreal;
+    uint32_T wordLuint;
+  } wordL;
+} IEEESingle;
+
+#endif                                 /* RTW_HEADER_rt_nonfinite_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */

1.Software/Verify/simulink/fuc_ert_rtw/rtw_proj.tmw

@@ -0,0 +1,4 @@
+Simulink Coder project for fuc using D:\Program Files\MATLAB\R2022b\toolbox\rtw\rtw\@RTW\MSVCBuild.m. MATLAB root = D:\Program Files\MATLAB\R2022b. SimStruct date: 26-7月-2022 02:34:02
+This file is generated by Simulink Coder for use by the make utility
+to determine when to rebuild objects when the name of the current Simulink Coder project changes.
+The rtwinfomat located at: ..\slprj\ert\fuc\tmwinternal\binfo.mat

1.Software/Verify/simulink/fuc_ert_rtw/rtwtypes.h

@@ -0,0 +1,176 @@
+/*
+ * File: rtwtypes.h
+ *
+ * Code generated for Simulink model 'fuc'.
+ *
+ * Model version                  : 1.18
+ * Simulink Coder version         : 9.8 (R2022b) 13-May-2022
+ * C/C++ source code generated on : Sat Jan  6 10:24:46 2024
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM 64-bit (LP64)
+ * Code generation objectives: Unspecified
+ * Validation result: Not run
+ */
+
+#ifndef RTWTYPES_H
+#define RTWTYPES_H
+
+/* Logical type definitions */
+#if (!defined(__cplusplus))
+#ifndef false
+#define false                          (0U)
+#endif
+
+#ifndef true
+#define true                           (1U)
+#endif
+#endif
+
+/*=======================================================================*
+ * Target hardware information
+ *   Device type: ARM Compatible->ARM 64-bit (LP64)
+ *   Number of bits:     char:   8    short:   16    int:  32
+ *                       long:  64    long long:  64
+ *                       native word size:  64
+ *   Byte ordering: LittleEndian
+ *   Signed integer division rounds to: Zero
+ *   Shift right on a signed integer as arithmetic shift: on
+ *=======================================================================*/
+
+/*=======================================================================*
+ * Fixed width word size data types:                                     *
+ *   int8_T, int16_T, int32_T     - signed 8, 16, or 32 bit integers     *
+ *   uint8_T, uint16_T, uint32_T  - unsigned 8, 16, or 32 bit integers   *
+ *   real32_T, real64_T           - 32 and 64 bit floating point numbers *
+ *=======================================================================*/
+typedef signed char int8_T;
+typedef unsigned char uint8_T;
+typedef short int16_T;
+typedef unsigned short uint16_T;
+typedef int int32_T;
+typedef unsigned int uint32_T;
+typedef long int64_T;
+typedef unsigned long uint64_T;
+typedef float real32_T;
+typedef double real64_T;
+
+/*===========================================================================*
+ * Generic type definitions: boolean_T, char_T, byte_T, int_T, uint_T,       *
+ *                           real_T, time_T, ulong_T, ulonglong_T.           *
+ *===========================================================================*/
+typedef double real_T;
+typedef double time_T;
+typedef unsigned char boolean_T;
+typedef int int_T;
+typedef unsigned int uint_T;
+typedef unsigned long ulong_T;
+typedef unsigned long long ulonglong_T;
+typedef char char_T;
+typedef unsigned char uchar_T;
+typedef char_T byte_T;
+
+/*===========================================================================*
+ * Complex number type definitions                                           *
+ *===========================================================================*/
+#define CREAL_T
+
+typedef struct {
+  real32_T re;
+  real32_T im;
+} creal32_T;
+
+typedef struct {
+  real64_T re;
+  real64_T im;
+} creal64_T;
+
+typedef struct {
+  real_T re;
+  real_T im;
+} creal_T;
+
+#define CINT8_T
+
+typedef struct {
+  int8_T re;
+  int8_T im;
+} cint8_T;
+
+#define CUINT8_T
+
+typedef struct {
+  uint8_T re;
+  uint8_T im;
+} cuint8_T;
+
+#define CINT16_T
+
+typedef struct {
+  int16_T re;
+  int16_T im;
+} cint16_T;
+
+#define CUINT16_T
+
+typedef struct {
+  uint16_T re;
+  uint16_T im;
+} cuint16_T;
+
+#define CINT32_T
+
+typedef struct {
+  int32_T re;
+  int32_T im;
+} cint32_T;
+
+#define CUINT32_T
+
+typedef struct {
+  uint32_T re;
+  uint32_T im;
+} cuint32_T;
+
+#define CINT64_T
+
+typedef struct {
+  int64_T re;
+  int64_T im;
+} cint64_T;
+
+#define CUINT64_T
+
+typedef struct {
+  uint64_T re;
+  uint64_T im;
+} cuint64_T;
+
+/*=======================================================================*
+ * Min and Max:                                                          *
+ *   int8_T, int16_T, int32_T     - signed 8, 16, or 32 bit integers     *
+ *   uint8_T, uint16_T, uint32_T  - unsigned 8, 16, or 32 bit integers   *
+ *=======================================================================*/
+#define MAX_int8_T                     ((int8_T)(127))
+#define MIN_int8_T                     ((int8_T)(-128))
+#define MAX_uint8_T                    ((uint8_T)(255U))
+#define MAX_int16_T                    ((int16_T)(32767))
+#define MIN_int16_T                    ((int16_T)(-32768))
+#define MAX_uint16_T                   ((uint16_T)(65535U))
+#define MAX_int32_T                    ((int32_T)(2147483647))
+#define MIN_int32_T                    ((int32_T)(-2147483647-1))
+#define MAX_uint32_T                   ((uint32_T)(0xFFFFFFFFU))
+#define MAX_int64_T                    ((int64_T)(9223372036854775807L))
+#define MIN_int64_T                    ((int64_T)(-9223372036854775807L-1L))
+#define MAX_uint64_T                   ((uint64_T)(0xFFFFFFFFFFFFFFFFUL))
+
+/* Block D-Work pointer type */
+typedef void * pointer_T;
+
+#endif                                 /* RTWTYPES_H */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */