91 lines
2.8 KiB
C
91 lines
2.8 KiB
C
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/**
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****************************************************************************************************
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* @file gtim.h
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* @author <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><EFBFBD><EFBFBD>Ŷ<EFBFBD>(ALIENTEK)
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* @version V1.1
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* @date 2021-10-15
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* @brief ͨ<EFBFBD>ö<EFBFBD>ʱ<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* @license Copyright (c) 2020-2032, <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿƼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˾
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****************************************************************************************************
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* @attention
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*
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* ʵ<EFBFBD><EFBFBD>ƽ̨:<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><EFBFBD> ̽<EFBFBD><EFBFBD><EFBFBD><EFBFBD> F407<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ:www.yuanzige.com
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̳:www.openedv.com
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* <EFBFBD><EFBFBD>˾<EFBFBD><EFBFBD>ַ:www.alientek.com
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:openedv.taobao.com
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*
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* <EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>
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* V1.0 20211015
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* <EFBFBD><EFBFBD>һ<EFBFBD>η<EFBFBD><EFBFBD><EFBFBD>
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* V1.1 20211015
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* 1,<EFBFBD><EFBFBD><EFBFBD><EFBFBD>gtim_timx_pwm_chy_init<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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****************************************************************************************************
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*/
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#ifndef __GTIM_H
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#define __GTIM_H
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#include "./SYSTEM/sys/sys.h"
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/****************************************************************************************************/
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/* ͨ<>ö<EFBFBD>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD> */
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/* TIMX <20>ж϶<D0B6><CFB6><EFBFBD>
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* Ĭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM2~TIM5
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* ע<EFBFBD><EFBFBD>: ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4<EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD><EFBFBD>,<EFBFBD><EFBFBD><EFBFBD><EFBFBD>֧<EFBFBD><EFBFBD>TIM1~TIM8<EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>.
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*/
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#define GTIM_TIMX_INT TIM2
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#define GTIM_TIMX_INT_IRQn TIM2_IRQn
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#define GTIM_TIMX_INT_IRQHandler TIM2_IRQHandler
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#define GTIM_TIMX_INT_CLK_ENABLE() do{ __HAL_RCC_TIM2_CLK_ENABLE(); }while(0) /* TIM3 ʱ<><CAB1>ʹ<EFBFBD><CAB9> */
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/*********************************<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>ö<EFBFBD>ʱ<EFBFBD><CAB1>PWM<57><4D><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD>غ궨<D8BA><EAB6A8>*************************************/
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/* TIMX PWM<57><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>LED0(RED)<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* Ĭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM2~TIM5
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* ע<EFBFBD><EFBFBD>: ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⼸<EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD><EFBFBD>,<EFBFBD><EFBFBD><EFBFBD><EFBFBD>֧<EFBFBD><EFBFBD>TIM1~TIM8<EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>,<EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>IO<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM
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*/
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#define GTIM_TIMX_PWM_CHY_GPIO_PORT GPIOA
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#define GTIM_TIMX_PWM_CHY_GPIO_PIN GPIO_PIN_2
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#define GTIM_TIMX_PWM_CHY_GPIO_CLK_ENABLE() do{ __HAL_RCC_GPIOA_CLK_ENABLE(); }while(0) /* PF<50><46>ʱ<EFBFBD><CAB1>ʹ<EFBFBD><CAB9> */
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#define GTIM_TIMX_PWM_CHY_GPIO_AF GPIO_AF1_TIM2 /* <20>˿ڸ<CBBF><DAB8>õ<EFBFBD>TIM14 */
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/* TIMX REMAP<41><50><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>LED0<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PF9<EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIM14<EFBFBD>IJ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD>书<EFBFBD><EFBFBD>, <EFBFBD><EFBFBD><EFBFBD>ܽ<EFBFBD>TIM14_CH1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PF9<EFBFBD><EFBFBD>
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*/
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#define GTIM_TIMX_PWM TIM2 /* TIM14 */
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#define GTIM_TIMX_PWM_CHY TIM_CHANNEL_3 /* ͨ<><CDA8>Y, 1<= Y <=4 */
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#define GTIM_TIMX_PWM_CHY_CCRX TIM2->CCR1 /* ͨ<><CDA8>Y<EFBFBD><59><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȽϼĴ<CFBC><C4B4><EFBFBD> */
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#define GTIM_TIMX_PWM_CHY_CLK_ENABLE() do{ __HAL_RCC_TIM2_CLK_ENABLE(); }while(0) /* TIM14 ʱ<><CAB1>ʹ<EFBFBD><CAB9> */
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/****************************************************************************************************/
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void gtim_timx_int_init(uint16_t arr, uint16_t psc); /* ͨ<>ö<EFBFBD>ʱ<EFBFBD><CAB1> <20><>ʱ<EFBFBD>жϳ<D0B6>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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void gtim_timx_pwm_chy_init(uint16_t arr, uint16_t psc); /* ͨ<>ö<EFBFBD>ʱ<EFBFBD><CAB1> PWM<57><4D>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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extern TIM_HandleTypeDef g_timx_pwm_chy_handle; /* <20><>ʱ<EFBFBD><CAB1>x<EFBFBD><78><EFBFBD><EFBFBD> */
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#endif
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