机舱采集器——不在使用

This commit is contained in:
张鹏
2024-11-19 17:19:21 +08:00
parent 813ab44f75
commit 41a0ea682f
1266 changed files with 926903 additions and 250 deletions

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#include "VM_AD7606.h"
#include "delay.h"
#include "usart.h"
#include "VM_Sampling_Control.h"
uint8_t AD_Data_Arr[18504];
uint8_t AD7606_Sampling_Flag = 0; //AD<41>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD>Ʊ<EFBFBD>־λ 0: ֹͣ<CDA3>ɼ<EFBFBD>; 1: <20><>ʼ<EFBFBD>ɼ<EFBFBD>
uint16_t AD_Arr_Num = 4; //<2F><><EFBFBD><EFBFBD>λ<EFBFBD>ñ<EFBFBD>־
uint16_t AD_Tim_Num = 0; //AD<41>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint16_t AD7606_SFC = 4; //AD<41><44><EFBFBD><EFBFBD>Ƶ<EFBFBD>ʿ<EFBFBD><CABF><EFBFBD>
uint16_t AD7606_SONC = 0; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
int16_t AD7606_DATA_Arr = 0; //<2F>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD>ݴ<EFBFBD>ȡ<EFBFBD><C8A1>
//AD7606<30><36><EFBFBD>ų<EFBFBD>ʼ<EFBFBD><CABC>
void AD7606_Init(void){
GPIO_InitTypeDef GPIO_InitStructure;
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
GPIO_InitStructure.Mode = GPIO_MODE_INPUT;//<2F><><EFBFBD><EFBFBD>ģʽ
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_HIGH; //<2F>ٶ<EFBFBD>50MHz
GPIO_InitStructure.Pull = GPIO_NOPULL; //<2F><><EFBFBD><EFBFBD>
//PD DB0 DB1 DB2
GPIO_InitStructure.Pin = AD7606_DB0| AD7606_DB1| AD7606_DB2;
HAL_GPIO_Init(GPIOD,&GPIO_InitStructure);
//PA DB3 DB4 DB5 DB6
GPIO_InitStructure.Pin = AD7606_DB3| AD7606_DB4| AD7606_DB5| AD7606_DB6;
HAL_GPIO_Init(GPIOA,&GPIO_InitStructure);
//PC DB7 DB8 DB9 DB10
GPIO_InitStructure.Pin = AD7606_DB7| AD7606_DB8| AD7606_DB9| AD7606_DB10;
HAL_GPIO_Init(GPIOC,&GPIO_InitStructure);
//PG DB11 DB12 DB13 BUSY FRSTDATA
GPIO_InitStructure.Pin = AD7606_DB11| AD7606_DB12| AD7606_DB13| AD7606_BUSY| AD7606_FRSTDATA;
HAL_GPIO_Init(GPIOG,&GPIO_InitStructure);
//PB DB14 DB15
GPIO_InitStructure.Pin = AD7606_DB14| AD7606_DB15;
HAL_GPIO_Init(GPIOB,&GPIO_InitStructure);
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;//<2F><><EFBFBD><EFBFBD>ģʽ
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_HIGH; //<2F>ٶ<EFBFBD>50MHz
GPIO_InitStructure.Pull = GPIO_NOPULL; //<2F><><EFBFBD><EFBFBD>
//PB CONVST RANGE
GPIO_InitStructure.Pin = AD7606_CONVST| AD7606_RANGE;
HAL_GPIO_Init(GPIOB,&GPIO_InitStructure);
//PE OS0 OS1 OS2 BYTE_SEL STBY
GPIO_InitStructure.Pin = AD7606_OS0| AD7606_OS1| AD7606_OS2| AD7606_STBY| AD7606_BYTE_SEL;
HAL_GPIO_Init(GPIOE,&GPIO_InitStructure);
//PG RESET RD CS
GPIO_InitStructure.Pin = AD7606_RESET| AD7606_RD| AD7606_CS;
HAL_GPIO_Init(GPIOG,&GPIO_InitStructure);
AD7606_Config();
}
//AD7606<30><36><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void AD7606_Config(void){
delay_us(1); //<2F><>ʱ<EFBFBD>ȴ<EFBFBD>AD7606<30>ϵ<EFBFBD>
AD7606_Reset(); //<2F>ϵ縴λ
AD7606_STBY_NORMAL(); //<2F><><EFBFBD><EFBFBD>ģʽ
AD7606_RANGE_5V(); //ģ<><C4A3><EFBFBD><EFBFBD><EFBFBD>Χ <20><><EFBFBD><EFBFBD>5V
AD7606_PRL(); //<2F><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
AD7606_Semples(AD7606_SEMPLE_200K); //0<><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
AD7606_Reset(); //<2F>ϵ縴λ
}
//<2F><><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD> OS[2:0]
void AD7606_Semples(u8 AD7606_Semp_Select){
switch(AD7606_Semp_Select){
case AD7606_SEMPLE_200K: //000
AD7606_OS2_LOW();
AD7606_OS1_LOW();
AD7606_OS0_LOW();
break;
case AD7606_SEMPLE_100K: //001
AD7606_OS2_LOW();
AD7606_OS1_LOW();
AD7606_OS0_HIGH();
break;
case AD7606_SEMPLE_50K: //010
AD7606_OS2_LOW();
AD7606_OS1_HIGH();
AD7606_OS0_LOW();
break;
case AD7606_SEMPLE_25K: //011
AD7606_OS2_LOW();
AD7606_OS1_HIGH();
AD7606_OS0_HIGH();
break;
case AD7606_SEMPLE_12K5: //100
AD7606_OS2_HIGH();
AD7606_OS1_LOW();
AD7606_OS0_LOW();
break;
case AD7606_SEMPLE_6K25: //101
AD7606_OS2_HIGH();
AD7606_OS1_LOW();
AD7606_OS0_HIGH();
break;
case AD7606_SEMPLE_3K125: //110
AD7606_OS2_HIGH();
AD7606_OS1_HIGH();
AD7606_OS0_LOW();
break;
default:
break;
}
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void AD7606_Data_Pro(uint8_t *Data){
AD7606_DATA_Arr = HAL_GPIO_ReadPin(GPIOD, AD7606_DB0)|
HAL_GPIO_ReadPin(GPIOD, AD7606_DB1) << 1|
HAL_GPIO_ReadPin(GPIOD, AD7606_DB2) << 2|
HAL_GPIO_ReadPin(GPIOA, AD7606_DB3) << 3|
HAL_GPIO_ReadPin(GPIOA, AD7606_DB4) << 4|
HAL_GPIO_ReadPin(GPIOA, AD7606_DB5) << 5|
HAL_GPIO_ReadPin(GPIOA, AD7606_DB6) << 6|
HAL_GPIO_ReadPin(GPIOC, AD7606_DB7) << 7|
HAL_GPIO_ReadPin(GPIOC, AD7606_DB8) << 8|
HAL_GPIO_ReadPin(GPIOC, AD7606_DB9) << 9|
HAL_GPIO_ReadPin(GPIOC, AD7606_DB10) << 10|
HAL_GPIO_ReadPin(GPIOG, AD7606_DB11) << 11|
HAL_GPIO_ReadPin(GPIOG, AD7606_DB12) << 12|
HAL_GPIO_ReadPin(GPIOG, AD7606_DB13) << 13|
HAL_GPIO_ReadPin(GPIOB, AD7606_DB14) << 14|
HAL_GPIO_ReadPin(GPIOB, AD7606_DB15) << 15;
Data[0] = AD7606_DATA_Arr >> 8;
Data[1] = AD7606_DATA_Arr;
}
//AD7606<30><36>λ<EFBFBD>ź<EFBFBD>
void AD7606_Reset(void){
/* AD7606<30>Ǹߵ<C7B8>ƽ<EFBFBD><C6BD>λ<EFBFBD><CEBB>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD>50ns ָ<><D6B8>ִ<EFBFBD><D6B4>ʱ<EFBFBD><CAB1>Ϊ60ns*/
AD7606_RST_LOW();
AD7606_RST_HIGH();
AD7606_RST_LOW();
}
//AD7606<30><36>ʼת<CABC><D7AA><EFBFBD>ź<EFBFBD>
void AD7606_Start_Convst(void){
/* <20><><EFBFBD><EFBFBD><EFBFBD>ؿ<EFBFBD>ʼת<CABC><D7AA><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>25ns */
AD7606_CONVST_HIGH();
//delay_us(1);
AD7606_CONVST_LOW();
//delay_us(1);
AD7606_CONVST_HIGH();
}
//AD7606<30><36><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD>ź<EFBFBD>
void AD7606_End_Convst(void){
AD7606_CONVST_HIGH();
//delay_us(1);
AD7606_CONVST_LOW();
//delay_us(1);
AD7606_CONVST_HIGH();
}
//AD7606<30><36>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
void AD7606_Read(uint8_t *Data){
int j = 0;
AD7606_CS_HIGH();
AD7606_RD_HIGH();
AD7606_Start_Convst(); //<2F><>ʼת<CABC><D7AA>
//delay_us(1);
while(AD7606_BUSY_STATE){}//<2F>ȴ<EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//delay_us(1);
//<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
AD7606_CS_LOW(); //<2F><><EFBFBD><EFBFBD>CS<43><53> ׼<><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݻ<EFBFBD>ȡ
AD7606_RD_LOW(); //<2F><><EFBFBD><EFBFBD>RD<52><44> <20>ȴ<EFBFBD>FRSTDATA<54><41>1 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݶ<EFBFBD>ȡ
while(!AD7606_FRST_STATE){}
//delay_us(1);
for(j=0; j<8; j++){
AD7606_Data_Pro( &Data[AD_Arr_Num + (j*1028)] );
AD7606_RD_HIGH(); //<2F>л<EFBFBD>RD<52><44>״̬ ׼<><D7BC><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>һͨ<D2BB><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
AD7606_RD_LOW();
}
Data[AD_Arr_Num + 8224] = HAL_GPIO_ReadPin(GPIOA,GPIO_PIN_2); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
AD_Arr_Num += 2;
//<2F><><EFBFBD>ݻ<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
AD7606_CS_HIGH();
AD7606_RD_HIGH();
CDC_Data_Send();
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD>ֽ<EFBFBD>
void Float_to_Byte(float data, uint8_t *arr){
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
union{
float float_val;
struct{
uint8_t low_byte;
uint8_t mlow_byte;
uint8_t mhigh_byte;
uint8_t high_byte;
}byte_arr;
}Float_Byte;
//<2F><>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD><C4B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
Float_Byte.float_val = data;
//<2F><>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
arr[0] = Float_Byte.byte_arr.high_byte;
arr[1] = Float_Byte.byte_arr.mhigh_byte;
arr[2] = Float_Byte.byte_arr.mlow_byte;
arr[3] = Float_Byte.byte_arr.low_byte;
}
void Data_to_ADbuf(void){
AD_Data_Arr[1028*0 + 0] = 0x00;
AD_Data_Arr[1028*0 + 1] = 0x00;
AD_Data_Arr[1028*0 + 2] = 0x00;
AD_Data_Arr[1028*0 + 3] = 0x00;
AD_Data_Arr[1028*1 + 0] = 0x01;
AD_Data_Arr[1028*1 + 1] = 0x01;
AD_Data_Arr[1028*1 + 2] = 0x01;
AD_Data_Arr[1028*1 + 3] = 0x01;
AD_Data_Arr[1028*2 + 0] = 0x02;
AD_Data_Arr[1028*2 + 1] = 0x02;
AD_Data_Arr[1028*2 + 2] = 0x02;
AD_Data_Arr[1028*2 + 3] = 0x02;
AD_Data_Arr[1028*3 + 0] = 0x03;
AD_Data_Arr[1028*3 + 1] = 0x03;
AD_Data_Arr[1028*3 + 2] = 0x03;
AD_Data_Arr[1028*3 + 3] = 0x03;
AD_Data_Arr[1028*4 + 0] = 0x04;
AD_Data_Arr[1028*4 + 1] = 0x04;
AD_Data_Arr[1028*4 + 2] = 0x04;
AD_Data_Arr[1028*4 + 3] = 0x04;
AD_Data_Arr[1028*5 + 0] = 0x05;
AD_Data_Arr[1028*5 + 1] = 0x05;
AD_Data_Arr[1028*5 + 2] = 0x05;
AD_Data_Arr[1028*5 + 3] = 0x05;
AD_Data_Arr[1028*6 + 0] = 0x06;
AD_Data_Arr[1028*6 + 1] = 0x06;
AD_Data_Arr[1028*6 + 2] = 0x06;
AD_Data_Arr[1028*6 + 3] = 0x06;
AD_Data_Arr[1028*7 + 0] = 0x07;
AD_Data_Arr[1028*7 + 1] = 0x07;
AD_Data_Arr[1028*7 + 2] = 0x07;
AD_Data_Arr[1028*7 + 3] = 0x07;
AD_Data_Arr[1028*8 + 0] = 0x08;
AD_Data_Arr[1028*8 + 1] = 0x08;
AD_Data_Arr[1028*8 + 2] = 0x08;
AD_Data_Arr[1028*8 + 3] = 0x08;
AD_Data_Arr[1028*9 + 0] = 0x00;
AD_Data_Arr[1028*9 + 1] = 0x00;
AD_Data_Arr[1028*9 + 2] = 0x00;
AD_Data_Arr[1028*9 + 3] = 0x00;
AD_Data_Arr[1028*10 + 0] = 0x01;
AD_Data_Arr[1028*10 + 1] = 0x01;
AD_Data_Arr[1028*10 + 2] = 0x01;
AD_Data_Arr[1028*10 + 3] = 0x01;
AD_Data_Arr[1028*11 + 0] = 0x02;
AD_Data_Arr[1028*11 + 1] = 0x02;
AD_Data_Arr[1028*11 + 2] = 0x02;
AD_Data_Arr[1028*11 + 3] = 0x02;
AD_Data_Arr[1028*12 + 0] = 0x03;
AD_Data_Arr[1028*12 + 1] = 0x03;
AD_Data_Arr[1028*12 + 2] = 0x03;
AD_Data_Arr[1028*12 + 3] = 0x03;
AD_Data_Arr[1028*13 + 0] = 0x04;
AD_Data_Arr[1028*13 + 1] = 0x04;
AD_Data_Arr[1028*13 + 2] = 0x04;
AD_Data_Arr[1028*13 + 3] = 0x04;
AD_Data_Arr[1028*14 + 0] = 0x05;
AD_Data_Arr[1028*14 + 1] = 0x05;
AD_Data_Arr[1028*14 + 2] = 0x05;
AD_Data_Arr[1028*14 + 3] = 0x05;
AD_Data_Arr[1028*15 + 0] = 0x06;
AD_Data_Arr[1028*15 + 1] = 0x06;
AD_Data_Arr[1028*15 + 2] = 0x06;
AD_Data_Arr[1028*15 + 3] = 0x06;
AD_Data_Arr[1028*16 + 0] = 0x07;
AD_Data_Arr[1028*16 + 1] = 0x07;
AD_Data_Arr[1028*16 + 2] = 0x07;
AD_Data_Arr[1028*16 + 3] = 0x07;
AD_Data_Arr[1028*17 + 0] = 0x08;
AD_Data_Arr[1028*17 + 1] = 0x08;
AD_Data_Arr[1028*17 + 2] = 0x08;
AD_Data_Arr[1028*17 + 3] = 0x08;
}

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#include "main.h"
#include "stdio.h"
#include "string.h"
#include "sys.h"
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0\1\2 3\4\5\6 7\8\9\10 11\12\13 14\15
#define AD7606_DB0 GPIO_PIN_7 //PD7
#define AD7606_DB1 GPIO_PIN_6 //PD6
#define AD7606_DB2 GPIO_PIN_2 //PD2
#define AD7606_DB3 GPIO_PIN_15 //PA15
#define AD7606_DB4 GPIO_PIN_10 //PA10
#define AD7606_DB5 GPIO_PIN_9 //PA9
#define AD7606_DB6 GPIO_PIN_8 //PA8
#define AD7606_DB7 GPIO_PIN_9 //PC9
#define AD7606_DB8 GPIO_PIN_8 //PC8
#define AD7606_DB9 GPIO_PIN_7 //PC7
#define AD7606_DB10 GPIO_PIN_6 //PC6
#define AD7606_DB11 GPIO_PIN_8 //PG8
#define AD7606_DB12 GPIO_PIN_7 //PG7
#define AD7606_DB13 GPIO_PIN_6 //PG6
#define AD7606_DB14 GPIO_PIN_15 //PB15
#define AD7606_DB15 GPIO_PIN_14 //PB14
//GPIOB <20><><EFBFBD><EFBFBD>
#define AD7606_GPIOX_CONVST_RANGE GPIOB
//CA CB<43><42><EFBFBD>ƽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define AD7606_CONVST GPIO_PIN_8 //PB8
//RANGE ģ<><C4A3><EFBFBD><EFBFBD><EFBFBD>Χѡ<CEA7><D1A1>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD>ΧΪ10V,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ5V) <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define AD7606_RANGE GPIO_PIN_9 //PB9
//OS0 1 2 <20><><EFBFBD><EFBFBD>Ƶ<EFBFBD>ʿ<EFBFBD><CABF>ƽ<EFBFBD> 000 <20>޹<EFBFBD><DEB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5>200k <20><><EFBFBD>߹<EFBFBD><DFB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 110 64<36><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define AD7606_GPIOX_OS GPIOE
#define AD7606_OS0 GPIO_PIN_6 //PE6
#define AD7606_OS1 GPIO_PIN_5 //PE5
#define AD7606_OS2 GPIO_PIN_4 //PE4
//GPIOE <20><><EFBFBD><EFBFBD>
#define AD7606_GPIOX_BYTE_STBY GPIOE
//BYTE_SEL <20><><EFBFBD>͵<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD>нӿ<D0BD>ͨ<EFBFBD><CDA8> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define AD7606_BYTE_SEL GPIO_PIN_3 //PE3
//STBY <20><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD>ƽ<EFBFBD>(<28><><EFBFBD><EFBFBD>RANGE<47><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>) <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define AD7606_STBY GPIO_PIN_2 //PE2
//GPIOG <20><><EFBFBD><EFBFBD>
#define AD7606_GPIOX_RST_RD_CS_BUSY_FRST GPIOG
//<2F><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define AD7606_RESET GPIO_PIN_14 //PG14
//RD\CS\BUSY <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>\<5C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>\<5C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define AD7606_RD GPIO_PIN_13 //PG13
#define AD7606_CS GPIO_PIN_12 //PG12
#define AD7606_BUSY GPIO_PIN_11 //PG11
//FRSTDATA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define AD7606_FRSTDATA GPIO_PIN_9 //PG9
//CS <09>ߵ͵<DFB5>ƽ
#define AD7606_CS_HIGH() HAL_GPIO_WritePin(AD7606_GPIOX_RST_RD_CS_BUSY_FRST, AD7606_CS,GPIO_PIN_SET)
#define AD7606_CS_LOW() HAL_GPIO_WritePin(AD7606_GPIOX_RST_RD_CS_BUSY_FRST, AD7606_CS,GPIO_PIN_RESET);
//RESET <09>ߵ͵<DFB5>ƽ
#define AD7606_RST_HIGH() HAL_GPIO_WritePin(AD7606_GPIOX_RST_RD_CS_BUSY_FRST, AD7606_RESET,GPIO_PIN_SET);
#define AD7606_RST_LOW() HAL_GPIO_WritePin(AD7606_GPIOX_RST_RD_CS_BUSY_FRST, AD7606_RESET,GPIO_PIN_RESET);
//RD <09>ߵ͵<DFB5>ƽ
#define AD7606_RD_HIGH() HAL_GPIO_WritePin(AD7606_GPIOX_RST_RD_CS_BUSY_FRST, AD7606_RD,GPIO_PIN_SET);
#define AD7606_RD_LOW() HAL_GPIO_WritePin(AD7606_GPIOX_RST_RD_CS_BUSY_FRST, AD7606_RD,GPIO_PIN_RESET);
//RANGE ģ<><C4A3><EFBFBD><EFBFBD><EFBFBD>Χ<EBB7B6><CEA7><EFBFBD><EFBFBD>
#define AD7606_RANGE_10V() HAL_GPIO_WritePin(AD7606_GPIOX_CONVST_RANGE, AD7606_RANGE,GPIO_PIN_SET);
#define AD7606_RANGE_5V() HAL_GPIO_WritePin(AD7606_GPIOX_CONVST_RANGE, AD7606_RANGE,GPIO_PIN_RESET);
//BYTE_SEL ͨ<>ŷ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD>
#define AD7606_SRL() HAL_GPIO_WritePin(AD7606_GPIOX_BYTE_STBY, AD7606_BYTE_SEL,GPIO_PIN_SET); //<2F><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
#define AD7606_PRL() HAL_GPIO_WritePin(AD7606_GPIOX_BYTE_STBY, AD7606_BYTE_SEL,GPIO_PIN_RESET); //<2F><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
//STBY <09><><EFBFBD><EFBFBD>ģʽѡ<CABD><D1A1>
#define AD7606_STBY_NORMAL() HAL_GPIO_WritePin(AD7606_GPIOX_BYTE_STBY, AD7606_STBY,GPIO_PIN_SET);
#define AD7606_STBY_SLEEP() HAL_GPIO_WritePin(AD7606_GPIOX_BYTE_STBY, AD7606_STBY,GPIO_PIN_RESET);
//RANGE <09><><EFBFBD><EFBFBD>ģʽѡ<CABD><D1A1> <09><>STBY<42><59><EFBFBD><EFBFBD>sleepģʽʱ
#define AD7606_RANGE_SB() HAL_GPIO_WritePin(AD7606_GPIOX_CONVST_RANGE, AD7606_RANGE,GPIO_PIN_SET); //<2F><><EFBFBD><EFBFBD> <09>ϵ<EFBFBD><CFB5><EFBFBD>100us<75><73><EFBFBD><EFBFBD>
#define AD7606_RANGE_SD() HAL_GPIO_WritePin(AD7606_GPIOX_CONVST_RANGE, AD7606_RANGE,GPIO_PIN_RESET);//<2F>ض<EFBFBD> <09>ϵ<EFBFBD><CFB5><EFBFBD>13ms<6D><73><EFBFBD><EFBFBD>,<2C><><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>RESET
//CONVST
#define AD7606_CONVST_HIGH() HAL_GPIO_WritePin(AD7606_GPIOX_CONVST_RANGE, AD7606_CONVST,GPIO_PIN_SET);
#define AD7606_CONVST_LOW() HAL_GPIO_WritePin(AD7606_GPIOX_CONVST_RANGE, AD7606_CONVST,GPIO_PIN_RESET);
//OS <09><><EFBFBD><EFBFBD>
#define AD7606_OS0_HIGH() HAL_GPIO_WritePin(AD7606_GPIOX_OS, AD7606_OS0,GPIO_PIN_SET);
#define AD7606_OS0_LOW() HAL_GPIO_WritePin(AD7606_GPIOX_OS, AD7606_OS0,GPIO_PIN_RESET);
#define AD7606_OS1_HIGH() HAL_GPIO_WritePin(AD7606_GPIOX_OS, AD7606_OS1,GPIO_PIN_SET);
#define AD7606_OS1_LOW() HAL_GPIO_WritePin(AD7606_GPIOX_OS, AD7606_OS1,GPIO_PIN_RESET);
#define AD7606_OS2_HIGH() HAL_GPIO_WritePin(AD7606_GPIOX_OS, AD7606_OS2,GPIO_PIN_SET);
#define AD7606_OS2_LOW() HAL_GPIO_WritePin(AD7606_GPIOX_OS, AD7606_OS2,GPIO_PIN_RESET);
//<2F><>ȡ״̬
#define AD7606_BUSY_STATE HAL_GPIO_ReadPin(AD7606_GPIOX_RST_RD_CS_BUSY_FRST,AD7606_BUSY)
#define AD7606_FRST_STATE HAL_GPIO_ReadPin(AD7606_GPIOX_RST_RD_CS_BUSY_FRST,AD7606_FRSTDATA)
//<2F><><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5>
#define AD7606_SEMPLE_200K 0
#define AD7606_SEMPLE_100K 2
#define AD7606_SEMPLE_50K 4
#define AD7606_SEMPLE_25K 8
#define AD7606_SEMPLE_12K5 16
#define AD7606_SEMPLE_6K25 32
#define AD7606_SEMPLE_3K125 64
extern uint8_t AD_Data_Arr[18504];
extern uint8_t AD7606_Sampling_Flag;
extern uint16_t AD_Arr_Num;
extern uint16_t AD_Tim_Num;
extern uint16_t AD7606_SFC;
extern uint16_t AD7606_SONC;
void AD7606_Init(void);
void AD7606_Config(void);
void AD7606_Semples(u8 AD7606_Semp_Select);
void AD7606_Data_Pro(uint8_t *Data);
void AD7606_Reset(void);
void AD7606_Start_Convst(void);
void AD7606_End_Convst(void);
void AD7606_Read(uint8_t *Data);
void Float_to_Byte(float data, uint8_t *arr);
void Data_to_ADbuf(void);

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#include "VM_ADC.h"
#include "delay.h"
ADC_HandleTypeDef ADC2_Handler;//ADC<44><43><EFBFBD><EFBFBD>
ADC_HandleTypeDef ADC3_Handler;//ADC<44><43><EFBFBD><EFBFBD>
//<2F><>ʼ<EFBFBD><CABC>ADC2
//ch: ADC_channels
//ͨ<><CDA8>ֵ 0~16ȡֵ<C8A1><D6B5>ΧΪ<CEA7><CEAA>ADC_CHANNEL_0~ADC_CHANNEL_16
void ADC2_Init(void)
{
ADC_ChannelConfTypeDef sConfig = {0};
ADC2_Handler.Instance=ADC2;
ADC2_Handler.Init.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4; //4<><34>Ƶ<EFBFBD><C6B5>ADCCLK=PCLK2/4=90/4=22.5MHZ
ADC2_Handler.Init.Resolution=ADC_RESOLUTION_12B; //12λģʽ
ADC2_Handler.Init.DataAlign=ADC_DATAALIGN_RIGHT; //<2F>Ҷ<EFBFBD><D2B6><EFBFBD>
ADC2_Handler.Init.ScanConvMode=DISABLE; //<2F><>ɨ<EFBFBD><C9A8>ģʽ
ADC2_Handler.Init.EOCSelection=DISABLE; //<2F>ر<EFBFBD>EOC<4F>ж<EFBFBD>
ADC2_Handler.Init.ContinuousConvMode=DISABLE; //<2F>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>
ADC2_Handler.Init.NbrOfConversion=1; //1<><31>ת<EFBFBD><D7AA><EFBFBD>ڹ<EFBFBD><DAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ҳ<><D2B2><EFBFBD><EFBFBD>ֻת<D6BB><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1
ADC2_Handler.Init.DiscontinuousConvMode=DISABLE; //<2F><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
ADC2_Handler.Init.NbrOfDiscConversion=0; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>Ϊ0
ADC2_Handler.Init.ExternalTrigConv=ADC_SOFTWARE_START; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
ADC2_Handler.Init.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_NONE;//ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
ADC2_Handler.Init.DMAContinuousRequests=DISABLE; //<2F>ر<EFBFBD>DMA<4D><41><EFBFBD><EFBFBD>
HAL_ADC_Init(&ADC2_Handler); //<2F><>ʼ<EFBFBD><CABC>
sConfig.Channel = ADC_CHANNEL_11;
sConfig.Rank = 1;
sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
HAL_ADC_ConfigChannel(&ADC2_Handler, &sConfig);
}
//<2F><>ʼ<EFBFBD><CABC>ADC3
//ch: ADC_channels
//ͨ<><CDA8>ֵ 0~16ȡֵ<C8A1><D6B5>ΧΪ<CEA7><CEAA>ADC_CHANNEL_0~ADC_CHANNEL_16
void ADC3_Init(void)
{
ADC_ChannelConfTypeDef sConfig = {0};
ADC3_Handler.Instance=ADC3;
ADC3_Handler.Init.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4; //4<><34>Ƶ<EFBFBD><C6B5>ADCCLK=PCLK2/4=90/4=22.5MHZ
ADC3_Handler.Init.Resolution=ADC_RESOLUTION_12B; //12λģʽ
ADC3_Handler.Init.DataAlign=ADC_DATAALIGN_RIGHT; //<2F>Ҷ<EFBFBD><D2B6><EFBFBD>
ADC3_Handler.Init.ScanConvMode=DISABLE; //<2F><>ɨ<EFBFBD><C9A8>ģʽ
ADC3_Handler.Init.EOCSelection=DISABLE; //<2F>ر<EFBFBD>EOC<4F>ж<EFBFBD>
ADC3_Handler.Init.ContinuousConvMode=DISABLE; //<2F>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>
ADC3_Handler.Init.NbrOfConversion=1; //1<><31>ת<EFBFBD><D7AA><EFBFBD>ڹ<EFBFBD><DAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ҳ<><D2B2><EFBFBD><EFBFBD>ֻת<D6BB><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1
ADC3_Handler.Init.DiscontinuousConvMode=DISABLE; //<2F><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
ADC3_Handler.Init.NbrOfDiscConversion=0; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>Ϊ0
ADC3_Handler.Init.ExternalTrigConv=ADC_SOFTWARE_START; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
ADC3_Handler.Init.ExternalTrigConvEdge=ADC_EXTERNALTRIGCONVEDGE_NONE;//ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
ADC3_Handler.Init.DMAContinuousRequests=DISABLE; //<2F>ر<EFBFBD>DMA<4D><41><EFBFBD><EFBFBD>
HAL_ADC_Init(&ADC3_Handler); //<2F><>ʼ<EFBFBD><CABC>
sConfig.Channel = ADC_CHANNEL_8;
sConfig.Rank = 1;
sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
HAL_ADC_ConfigChannel(&ADC3_Handler, &sConfig);
}
//ADC<44>ײ<EFBFBD><D7B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD>ʱ<EFBFBD><CAB1>ʹ<EFBFBD><CAB9>
//<2F>˺<EFBFBD><CBBA><EFBFBD><EFBFBD>ᱻHAL_ADC_Init()<29><><EFBFBD><EFBFBD>
//hadc:ADC<44><43><EFBFBD><EFBFBD>
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
GPIO_InitTypeDef GPIO_Initure;
if(hadc == &ADC2_Handler)
{
__HAL_RCC_ADC2_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
GPIO_Initure.Pin=GPIO_PIN_1; //PC1
GPIO_Initure.Mode=GPIO_MODE_ANALOG; //ģ<><C4A3>
GPIO_Initure.Pull=GPIO_NOPULL; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
HAL_GPIO_Init(GPIOC,&GPIO_Initure);
}
if(hadc == &ADC3_Handler)
{
__HAL_RCC_ADC3_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
GPIO_Initure.Pin=GPIO_PIN_10; //PF8
GPIO_Initure.Mode=GPIO_MODE_ANALOG; //ģ<><C4A3>
GPIO_Initure.Pull=GPIO_NOPULL; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
HAL_GPIO_Init(GPIOF,&GPIO_Initure);
}
}
u32 Get_Adc_Value(ADC_HandleTypeDef* hadc)
{
u32 temp_val=0;
HAL_ADC_Start(hadc);
HAL_ADC_PollForConversion(hadc,10);
temp_val = HAL_ADC_GetValue(hadc);
return temp_val;
}

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#ifndef __VM_ADC_H
#define __VM_ADC_H
#include "sys.h"
extern ADC_HandleTypeDef ADC2_Handler;
extern ADC_HandleTypeDef ADC3_Handler;
void ADC2_Init(void); //ADCͨ<43><CDA8><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
void ADC3_Init(void); //ADCͨ<43><CDA8><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
u32 Get_Adc_Value(ADC_HandleTypeDef* hadc);
#endif

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#include "VM_Exti.h"
uint32_t Hall_Frequency_Num = 0; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD>
uint32_t Hall_Num = 0; //Ƶ<>ʼ<EFBFBD><CABC><EFBFBD>
uint16_t Hall_Tim_Num = 0; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>־λ
uint8_t Hall_Gather_Control = 0; //<2F><><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//<2F>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void EXTI0_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0); //<2F><><EFBFBD><EFBFBD><EFBFBD>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>
}
void EXTI2_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2); //<2F><><EFBFBD><EFBFBD><EFBFBD>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>
}
void EXTI3_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3); //<2F><><EFBFBD><EFBFBD><EFBFBD>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>
}
void EXTI4_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4); //<2F><><EFBFBD><EFBFBD><EFBFBD>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>
}
//<2F>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//<2F><>HAL<41><4C><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5>ⲿ<EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ô˺<C3B4><CBBA><EFBFBD>
//GPIO_Pin:<3A>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ź<EFBFBD>
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
{
switch(GPIO_Pin)
{
case GPIO_PIN_2:
if(Hall_Gather_Control == 1){ //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ (<28><><EFBFBD><EFBFBD>ʵ<EFBFBD>ָù<D6B8><C3B9><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϿ<D0B6><CFBF><EFBFBD>)
Hall_Frequency_Num++;
}
break;
}
}

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#ifndef _VM_EXTI_H
#define _VM_EXTI_H
#include "sys.h"
extern uint32_t Hall_Frequency_Num;
extern uint32_t Hall_Num;
extern uint16_t Hall_Tim_Num;
extern uint8_t Hall_Gather_Control;
#endif

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#include "VM_Sampling_Control.h"
#include "VM_AD7606.h"
#include "usbd_cdc_if.h"
uint8_t Control_Buf[8] = {3}; //ָ<><D6B8><EFBFBD>洢buf
uint8_t Control_Ins_Flag = 0; //ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD>ձ<EFBFBD>־ 0<><30>δ<EFBFBD><CEB4><EFBFBD>գ<EFBFBD> 1<><31><EFBFBD>ѽ<EFBFBD><D1BD><EFBFBD>
uint8_t instruct_flag = 0; //ָ<><D6B8><EFBFBD>жϱ<D0B6>־<EFBFBD><D6BE>
//<2F><>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t frequency_control = 3; //Ƶ<>ʿ<EFBFBD><CABF><EFBFBD><EFBFBD><EFBFBD> 2 : 10k ; 1 : 20k ; 0 : 40k
uint8_t sampling_control = 2; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0 : ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD> ; 1 : <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>
uint8_t reset_control = 0; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1 : ִ<>и<EFBFBD>λ
uint8_t hall_control = 2; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0 : ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD> ; 1 : <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>
//<2F>ɼ<EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void Sampling_Control(void){
//<2F><><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
switch (frequency_control){
case 0:
AD7606_SFC = 1; //40k
break;
case 1:
AD7606_SFC = 2; //20k
break;
case 2:
AD7606_SFC = 4; //10k
break;
default :
break;
}
if(sampling_control == 1){ //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>
AD7606_Sampling_Flag = 1;
}
else if(sampling_control == 0){ //ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD>
AD7606_Sampling_Flag = 0;
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
if(reset_control == 1){
__set_FAULTMASK(1); //<2F>ر<EFBFBD><D8B1>ж<EFBFBD>
NVIC_SystemReset(); //<2F><>λ
}
//<2F><><EFBFBD><EFBFBD>Ƶ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD> <20>ݶ<EFBFBD>
if(hall_control == 1){
}
//AD<41><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ݶ<EFBFBD>
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
void CDC_Data_Send(void){
if(AD_Arr_Num == 1028){
CDC_Transmit_HS(AD_Data_Arr,9252);
AD_Arr_Num = 9256;
}
if(AD_Arr_Num == 10280){
CDC_Transmit_HS(&AD_Data_Arr[9252],9252);
AD_Arr_Num = 4;
}
}
//ָ<><D6B8><EFBFBD>ж<EFBFBD>
void Instruct_Judgment(void){
// if(Control_Ins_Flag == 1)
// {
//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
if(Control_Buf[0] == 0x00 && Control_Buf[1] == 0x00 && Control_Buf[2] == 0x00 && Control_Buf[3] == 0x00)
{
}
//ָ<><D6B8><EFBFBD>ж<EFBFBD>
else if(Control_Buf[0] == 0x01 && Control_Buf[1] == 0x01 && Control_Buf[2] == 0x01 && Control_Buf[3] == 0x01)
{
//<2F><>ʼ/ֹͣ <20><><EFBFBD><EFBFBD>
if(Control_Buf[4] == 0 && Control_Buf[5] == 0)
{
sampling_control = 0;
}
else if(Control_Buf[4] == 1 && Control_Buf[5] == 1)
{
sampling_control = 1;
}
//<2F><><EFBFBD>ò<EFBFBD><C3B2><EFBFBD>Ƶ<EFBFBD><C6B5>
if(Control_Buf[6] == 0 && Control_Buf[7] == 0)
{
frequency_control = 0;
}
else if(Control_Buf[6] == 1 && Control_Buf[7] == 1)
{
frequency_control = 1;
}
else if(Control_Buf[6] == 2 && Control_Buf[7] == 2)
{
frequency_control = 2;
}
}
// Control_Ins_Flag = 0;
// }
}

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#include "sys.h"
extern uint8_t Control_Buf[8];
extern uint8_t Control_Ins_Flag;
void Sampling_Control(void);
void CDC_Data_Send(void);
void Instruct_Judgment(void);

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#include "VM_Sram.h"
#include "delay.h"
u8 Sram_Buf[50000] __attribute__((at(0X68000000)));//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SRAM_HandleTypeDef SRAM_Handler; //SRAM<41><4D><EFBFBD><EFBFBD>
//SRAM<41><4D>ʼ<EFBFBD><CABC>
void SRAM_Init(void)
{
GPIO_InitTypeDef GPIO_Initure;
FSMC_NORSRAM_TimingTypeDef FSMC_ReadWriteTim;
__HAL_RCC_FSMC_CLK_ENABLE(); //ʹ<><CAB9>FSMCʱ<43><CAB1>
__HAL_RCC_GPIOD_CLK_ENABLE(); //ʹ<><CAB9>GPIODʱ<44><CAB1>
__HAL_RCC_GPIOE_CLK_ENABLE(); //ʹ<><CAB9>GPIOEʱ<45><CAB1>
__HAL_RCC_GPIOF_CLK_ENABLE(); //ʹ<><CAB9>GPIOFʱ<46><CAB1>
__HAL_RCC_GPIOG_CLK_ENABLE(); //ʹ<><CAB9>GPIOGʱ<47><CAB1>
//PD0,1,4,5,8~15
GPIO_Initure.Pin=GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_8|\
GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|\
GPIO_PIN_14|GPIO_PIN_15;
GPIO_Initure.Mode=GPIO_MODE_AF_PP; //<2F><><EFBFBD><EFBFBD><ECB8B4>
GPIO_Initure.Pull=GPIO_PULLUP; //<2F><><EFBFBD><EFBFBD>
GPIO_Initure.Speed=GPIO_SPEED_HIGH; //<2F><><EFBFBD><EFBFBD>
GPIO_Initure.Alternate=GPIO_AF12_FSMC; //<2F><><EFBFBD><EFBFBD>ΪFSMC
HAL_GPIO_Init(GPIOD,&GPIO_Initure);
//PE0,1,7~15
GPIO_Initure.Pin=GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|\
GPIO_PIN_10| GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|\
GPIO_PIN_15;
HAL_GPIO_Init(GPIOE,&GPIO_Initure);
//PF0~5,12~15
GPIO_Initure.Pin=GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|\
GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
HAL_GPIO_Init(GPIOF,&GPIO_Initure);
//PG0~5,10
GPIO_Initure.Pin=GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_10;
HAL_GPIO_Init(GPIOG,&GPIO_Initure);
SRAM_Handler.Instance=FSMC_NORSRAM_DEVICE;
SRAM_Handler.Extended=FSMC_NORSRAM_EXTENDED_DEVICE;
SRAM_Handler.Init.NSBank=FSMC_NORSRAM_BANK3; //ʹ<><CAB9>NE3
SRAM_Handler.Init.DataAddressMux=FSMC_DATA_ADDRESS_MUX_DISABLE; //<2F><>ַ/<2F><><EFBFBD><EFBFBD><EFBFBD>߲<EFBFBD><DFB2><EFBFBD><EFBFBD><EFBFBD>
SRAM_Handler.Init.MemoryType=FSMC_MEMORY_TYPE_SRAM; //SRAM
SRAM_Handler.Init.MemoryDataWidth=FSMC_NORSRAM_MEM_BUS_WIDTH_16; //16λ<36><CEBB><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD>
SRAM_Handler.Init.BurstAccessMode=FSMC_BURST_ACCESS_MODE_DISABLE; //<2F>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><E6B4A2><EFBFBD><EFBFBD>Ч,<2C>˴<EFBFBD>δ<EFBFBD>õ<EFBFBD>
SRAM_Handler.Init.WaitSignalPolarity=FSMC_WAIT_SIGNAL_POLARITY_LOW; //<2F>ȴ<EFBFBD><C8B4>źŵļ<C5B5><C4BC><EFBFBD>,<2C><><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SRAM_Handler.Init.WaitSignalActive=FSMC_WAIT_TIMING_BEFORE_WS; //<2F><EFBFBD><E6B4A2><EFBFBD><EFBFBD><EFBFBD>ڵȴ<DAB5><C8B4><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0>һ<EFBFBD><D2BB>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڻ<EFBFBD><DABB>ǵȴ<C7B5><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڼ<EFBFBD>ʹ<EFBFBD><CAB9>NWAIT
SRAM_Handler.Init.WriteOperation=FSMC_WRITE_OPERATION_ENABLE; //<2F><EFBFBD><E6B4A2>дʹ<D0B4><CAB9>
SRAM_Handler.Init.WaitSignal=FSMC_WAIT_SIGNAL_DISABLE; //<2F>ȴ<EFBFBD>ʹ<EFBFBD><CAB9>λ,<2C>˴<EFBFBD>δ<EFBFBD>õ<EFBFBD>
SRAM_Handler.Init.ExtendedMode=FSMC_EXTENDED_MODE_DISABLE; //<2F><>дʹ<D0B4><CAB9><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>ʱ<EFBFBD><CAB1>
SRAM_Handler.Init.AsynchronousWait=FSMC_ASYNCHRONOUS_WAIT_DISABLE; //<2F>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3>µĵȴ<C4B5><C8B4>ź<EFBFBD>,<2C>˴<EFBFBD>δ<EFBFBD>õ<EFBFBD>
SRAM_Handler.Init.WriteBurst=FSMC_WRITE_BURST_DISABLE; //<2F><>ֹͻ<D6B9><CDBB>д
SRAM_Handler.Init.ContinuousClock=FSMC_CONTINUOUS_CLOCK_SYNC_ASYNC;
//FMC<4D><43>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ƼĴ<C6BC><C4B4><EFBFBD>
FSMC_ReadWriteTim.AddressSetupTime=0x00; //<2F><>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>ʱ<EFBFBD>䣨ADDSET<45><54>Ϊ1<CEAA><31>HCLK 1/168M=6ns*16=96ns
FSMC_ReadWriteTim.AddressHoldTime=0x00; //<2F><>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>ʱ<EFBFBD>䣨ADDHLD<4C><44>ģʽ<41>õ<EFBFBD>
FSMC_ReadWriteTim.DataSetupTime=0x03; //<2F><><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>ʱ<EFBFBD><CAB1>Ϊ8<CEAA><38>HCLK =6*1=6ns
FSMC_ReadWriteTim.BusTurnAroundDuration=0X00;
FSMC_ReadWriteTim.AccessMode=FSMC_ACCESS_MODE_A;//ģʽA
HAL_SRAM_Init(&SRAM_Handler,&FSMC_ReadWriteTim,&FSMC_ReadWriteTim);
}
//<2F><>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ(WriteAddr+Bank1_SRAM3_ADDR)<29><>ʼ,<2C><><EFBFBD><EFBFBD>д<EFBFBD><D0B4>n<EFBFBD><6E><EFBFBD>ֽ<EFBFBD>.
//pBuffer:<3A>ֽ<EFBFBD>ָ<EFBFBD><D6B8>
//WriteAddr:Ҫд<D2AA><D0B4><EFBFBD>ĵ<EFBFBD>ַ
//n:Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>
void FSMC_SRAM_WriteBuffer(u8 *pBuffer,u32 WriteAddr,u32 n)
{
for(;n!=0;n--)
{
*(vu8*)(Bank1_SRAM3_ADDR+WriteAddr)=*pBuffer;
WriteAddr++;
pBuffer++;
}
}
//<2F><>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ((WriteAddr+Bank1_SRAM3_ADDR))<29><>ʼ,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>n<EFBFBD><6E><EFBFBD>ֽ<EFBFBD>.
//pBuffer:<3A>ֽ<EFBFBD>ָ<EFBFBD><D6B8>
//ReadAddr:Ҫ<><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
//n:Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>
void FSMC_SRAM_ReadBuffer(u8 *pBuffer,u32 ReadAddr,u32 n)
{
for(;n!=0;n--)
{
*pBuffer++=*(vu8*)(Bank1_SRAM3_ADDR+ReadAddr);
ReadAddr++;
}
}

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@@ -0,0 +1,15 @@
#include "sys.h"
extern u8 Sram_Buf[50000];
extern SRAM_HandleTypeDef SRAM_Handler; //SRAM<41><4D><EFBFBD><EFBFBD>
//ʹ<><CAB9>NOR/SRAM<41><4D> Bank1.sector3,<2C><>ַλHADDR[27,26]=10
//<2F><>IS61LV25616/IS62WV25616,<2C><>ַ<EFBFBD>߷<EFBFBD>ΧΪA0~A17
//<2F><>IS61LV51216/IS62WV51216,<2C><>ַ<EFBFBD>߷<EFBFBD>ΧΪA0~A18
#define Bank1_SRAM3_ADDR ((u32)(0x68000000))
void SRAM_Init(void);
void FSMC_SRAM_WriteBuffer(u8 *pBuffer,u32 WriteAddr,u32 n);
void FSMC_SRAM_ReadBuffer(u8 *pBuffer,u32 ReadAddr,u32 n);

View File

@@ -0,0 +1,221 @@
#include "delay.h"
#include "sys.h"
//////////////////////////////////////////////////////////////////////////////////
//<2F><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>ucos,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>.
#if SYSTEM_SUPPORT_OS
#include "includes.h" //ucos ʹ<><CAB9>
#endif
static u32 fac_us=0; //us<75><73>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#if SYSTEM_SUPPORT_OS
static u16 fac_ms=0; //ms<6D><73>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>os<6F><73>,<2C><><EFBFBD><EFBFBD>ÿ<EFBFBD><C3BF><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ms<6D><73>
#endif
#if SYSTEM_SUPPORT_OS //<2F><><EFBFBD><EFBFBD>SYSTEM_SUPPORT_OS<4F><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><><CBB5>Ҫ֧<D2AA><D6A7>OS<4F><53>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>UCOS).
//<2F><>delay_us/delay_ms<6D><73>Ҫ֧<D2AA><D6A7>OS<4F><53>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>OS<4F><53><EFBFBD>صĺ궨<C4BA><EAB6A8><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD>֧<EFBFBD><D6A7>
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>3<EFBFBD><33><EFBFBD><EFBFBD><EAB6A8>:
//delay_osrunning:<3A><><EFBFBD>ڱ<EFBFBD>ʾOS<4F><53>ǰ<EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>Ծ<EFBFBD><D4BE><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD>غ<EFBFBD><D8BA><EFBFBD>
//delay_ostickspersec:<3A><><EFBFBD>ڱ<EFBFBD>ʾOS<4F><EFBFBD><E8B6A8>ʱ<EFBFBD>ӽ<EFBFBD><D3BD><EFBFBD>,delay_init<69><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>systick
//delay_osintnesting:<3A><><EFBFBD>ڱ<EFBFBD>ʾOS<4F>ж<EFBFBD>Ƕ<EFBFBD>׼<EFBFBD><D7BC><EFBFBD>,<2C><>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><E6B2BB><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD>,delay_msʹ<73>øò<C3B8><C3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//Ȼ<><C8BB><EFBFBD><EFBFBD>3<EFBFBD><33><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:
//delay_osschedlock:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>OS<4F><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>
//delay_osschedunlock:<3A><><EFBFBD>ڽ<EFBFBD><DABD><EFBFBD>OS<4F><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//delay_ostimedly:<3A><><EFBFBD><EFBFBD>OS<4F><53>ʱ,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
//<2F><><EFBFBD><EFBFBD><EFBFBD>̽<EFBFBD><CCBD><EFBFBD>UCOSII<49><49>UCOSIII<49><49>֧<EFBFBD><D6A7>,<2C><><EFBFBD><EFBFBD>OS,<2C><><EFBFBD><EFBFBD><EFBFBD>вο<D0B2><CEBF><EFBFBD><EFBFBD><EFBFBD>ֲ
//֧<><D6A7>UCOSII
#ifdef OS_CRITICAL_METHOD //OS_CRITICAL_METHOD<4F><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><><CBB5>Ҫ֧<D2AA><D6A7>UCOSII
#define delay_osrunning OSRunning //OS<4F>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>,0,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>;1,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define delay_ostickspersec OS_TICKS_PER_SEC //OSʱ<53>ӽ<EFBFBD><D3BD><EFBFBD>,<2C><>ÿ<EFBFBD><C3BF><EFBFBD><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
#define delay_osintnesting OSIntNesting //<2F>ж<EFBFBD>Ƕ<EFBFBD>׼<EFBFBD><D7BC><EFBFBD>,<2C><><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD>״<EFBFBD><D7B4><EFBFBD>
#endif
//֧<><D6A7>UCOSIII
#ifdef CPU_CFG_CRITICAL_METHOD //CPU_CFG_CRITICAL_METHOD<4F><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><><CBB5>Ҫ֧<D2AA><D6A7>UCOSIII
#define delay_osrunning OSRunning //OS<4F>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>,0,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>;1,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define delay_ostickspersec OSCfg_TickRate_Hz //OSʱ<53>ӽ<EFBFBD><D3BD><EFBFBD>,<2C><>ÿ<EFBFBD><C3BF><EFBFBD><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
#define delay_osintnesting OSIntNestingCtr //<2F>ж<EFBFBD>Ƕ<EFBFBD>׼<EFBFBD><D7BC><EFBFBD>,<2C><><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD>״<EFBFBD><D7B4><EFBFBD>
#endif
//us<75><73><EFBFBD><EFBFBD>ʱʱ,<2C>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(<28><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>us<75><73><EFBFBD>ӳ<EFBFBD>)
void delay_osschedlock(void)
{
#ifdef CPU_CFG_CRITICAL_METHOD //ʹ<><CAB9>UCOSIII
OS_ERR err;
OSSchedLock(&err); //UCOSIII<49>ķ<EFBFBD>ʽ,<2C><>ֹ<EFBFBD><D6B9><EFBFBD>ȣ<EFBFBD><C8A3><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>us<75><73>ʱ
#else //<2F><><EFBFBD><EFBFBD>UCOSII
OSSchedLock(); //UCOSII<49>ķ<EFBFBD>ʽ,<2C><>ֹ<EFBFBD><D6B9><EFBFBD>ȣ<EFBFBD><C8A3><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>us<75><73>ʱ
#endif
}
//us<75><73><EFBFBD><EFBFBD>ʱʱ,<2C>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void delay_osschedunlock(void)
{
#ifdef CPU_CFG_CRITICAL_METHOD //ʹ<><CAB9>UCOSIII
OS_ERR err;
OSSchedUnlock(&err); //UCOSIII<49>ķ<EFBFBD>ʽ,<2C>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>
#else //<2F><><EFBFBD><EFBFBD>UCOSII
OSSchedUnlock(); //UCOSII<49>ķ<EFBFBD>ʽ,<2C>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>
#endif
}
//<2F><><EFBFBD><EFBFBD>OS<4F>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ
//ticks:<3A><>ʱ<EFBFBD>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD><EFBFBD>
void delay_ostimedly(u32 ticks)
{
#ifdef CPU_CFG_CRITICAL_METHOD
OS_ERR err;
OSTimeDly(ticks,OS_OPT_TIME_PERIODIC,&err); //UCOSIII<49><49>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
#else
OSTimeDly(ticks); //UCOSII<49><49>ʱ
#endif
}
//systick<63>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,ʹ<><CAB9>OSʱ<53>õ<EFBFBD>
void SysTick_Handler(void)
{
HAL_IncTick();
if(delay_osrunning==1) //OS<4F><53>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>,<2C><>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5>ȴ<EFBFBD><C8B4><EFBFBD>
{
OSIntEnter(); //<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
OSTimeTick(); //<2F><><EFBFBD><EFBFBD>ucos<6F><73>ʱ<EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
OSIntExit(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD>ж<EFBFBD>
}
}
#endif
//<2F><>ʼ<EFBFBD><CABC><EFBFBD>ӳٺ<D3B3><D9BA><EFBFBD>
//<2F><>ʹ<EFBFBD><CAB9>ucos<6F><73>ʱ<EFBFBD><CAB1>,<2C>˺<EFBFBD><CBBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ucos<6F><73>ʱ<EFBFBD>ӽ<EFBFBD><D3BD><EFBFBD>
//SYSTICK<43><4B>ʱ<EFBFBD>ӹ̶<D3B9>ΪAHBʱ<42><CAB1>
//SYSCLK:ϵͳʱ<CDB3><CAB1>Ƶ<EFBFBD><C6B5>
void delay_init(u8 SYSCLK)
{
#if SYSTEM_SUPPORT_OS //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ֧<D2AA><D6A7>OS.
u32 reload;
#endif
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);//SysTickƵ<6B><C6B5>ΪHCLK
fac_us=SYSCLK; //<2F><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>OS,fac_us<75><73><EFBFBD><EFBFBD>Ҫʹ<D2AA><CAB9>
#if SYSTEM_SUPPORT_OS //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ֧<D2AA><D6A7>OS.
reload=SYSCLK; //ÿ<><C3BF><EFBFBD>ӵļ<D3B5><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>λΪK
reload*=1000000/delay_ostickspersec; //<2F><><EFBFBD><EFBFBD>delay_ostickspersec<65><EFBFBD><E8B6A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
//reloadΪ24λ<34>Ĵ<EFBFBD><C4B4><EFBFBD>,<2C><><EFBFBD><EFBFBD>ֵ:16777216,<2C><>180M<30><4D><><D4BC>0.745s<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
fac_ms=1000/delay_ostickspersec; //<2F><><EFBFBD><EFBFBD>OS<4F><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ٵ<EFBFBD>λ
SysTick->CTRL|=SysTick_CTRL_TICKINT_Msk;//<2F><><EFBFBD><EFBFBD>SYSTICK<43>ж<EFBFBD>
SysTick->LOAD=reload; //ÿ1/OS_TICKS_PER_SEC<45><43><EFBFBD>ж<EFBFBD>һ<EFBFBD><D2BB>
SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk; //<2F><><EFBFBD><EFBFBD>SYSTICK
#else
#endif
}
#if SYSTEM_SUPPORT_OS //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ֧<D2AA><D6A7>OS.
//<2F><>ʱnus
//nus:Ҫ<><D2AA>ʱ<EFBFBD><CAB1>us<75><73>.
//nus:0~190887435(<28><><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5>2^32/fac_us@fac_us=22.5)
void delay_us(u32 nus)
{
u32 ticks;
u32 told,tnow,tcnt=0;
u32 reload=SysTick->LOAD; //LOAD<41><44>ֵ
ticks=nus*fac_us; //<2F><>Ҫ<EFBFBD>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD><EFBFBD>
delay_osschedlock(); //<2F><>ֹOS<4F><53><EFBFBD>ȣ<EFBFBD><C8A3><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>us<75><73>ʱ
told=SysTick->VAL; //<2F>ս<EFBFBD><D5BD><EFBFBD>ʱ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>ֵ
while(1)
{
tnow=SysTick->VAL;
if(tnow!=told)
{
if(tnow<told)tcnt+=told-tnow; //<2F><><EFBFBD><EFBFBD>ע<EFBFBD><D7A2>һ<EFBFBD><D2BB>SYSTICK<43><4B>һ<EFBFBD><D2BB><EFBFBD>ݼ<EFBFBD><DDBC>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϳ<EFBFBD><CDBF><EFBFBD><EFBFBD><EFBFBD>.
else tcnt+=reload-tnow+told;
told=tnow;
if(tcnt>=ticks)break; //ʱ<><EFBFBD><E4B3AC>/<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD>ӳٵ<D3B3>ʱ<EFBFBD><CAB1>,<2C><><EFBFBD>˳<EFBFBD>.
}
};
delay_osschedunlock(); //<2F>ָ<EFBFBD>OS<4F><53><EFBFBD><EFBFBD>
}
//<2F><>ʱnms
//nms:Ҫ<><D2AA>ʱ<EFBFBD><CAB1>ms<6D><73>
//nms:0~65535
void delay_ms(u16 nms)
{
if(delay_osrunning&&delay_osintnesting==0)//<2F><><EFBFBD><EFBFBD>OS<4F>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD>Ҳ<EFBFBD><D2B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>(<28>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><E6B2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
{
if(nms>=fac_ms) //<2F><>ʱ<EFBFBD><CAB1>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>OS<4F><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
delay_ostimedly(nms/fac_ms); //OS<4F><53>ʱ
}
nms%=fac_ms; //OS<4F>Ѿ<EFBFBD><D1BE>޷<EFBFBD><DEB7><EFBFBD><E1B9A9>ôС<C3B4><D0A1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>ʽ<EFBFBD><CABD>ʱ
}
delay_us((u32)(nms*1000)); //<2F><>ͨ<EFBFBD><CDA8>ʽ<EFBFBD><CABD>ʱ
}
#else //<2F><><EFBFBD><EFBFBD>ucosʱ
//<2F><>ʱnus
//nusΪҪ<CEAA><D2AA>ʱ<EFBFBD><CAB1>us<75><73>.
//nus:0~190887435(<28><><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5>2^32/fac_us@fac_us=22.5)
void delay_us(u32 nus)
{
u32 ticks;
u32 told,tnow,tcnt=0;
u32 reload=SysTick->LOAD; //LOAD<41><44>ֵ
ticks=nus*fac_us; //<2F><>Ҫ<EFBFBD>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD><EFBFBD>
told=SysTick->VAL; //<2F>ս<EFBFBD><D5BD><EFBFBD>ʱ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>ֵ
while(1)
{
tnow=SysTick->VAL;
if(tnow!=told)
{
if(tnow<told)tcnt+=told-tnow; //<2F><><EFBFBD><EFBFBD>ע<EFBFBD><D7A2>һ<EFBFBD><D2BB>SYSTICK<43><4B>һ<EFBFBD><D2BB><EFBFBD>ݼ<EFBFBD><DDBC>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϳ<EFBFBD><CDBF><EFBFBD><EFBFBD><EFBFBD>.
else tcnt+=reload-tnow+told;
told=tnow;
if(tcnt>=ticks)break; //ʱ<><EFBFBD><E4B3AC>/<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD>ӳٵ<D3B3>ʱ<EFBFBD><CAB1>,<2C><><EFBFBD>˳<EFBFBD>.
}
};
}
//<2F><>ʱnms
//nms:Ҫ<><D2AA>ʱ<EFBFBD><CAB1>ms<6D><73>
void delay_ms(u16 nms)
{
u32 i;
for(i=0;i<nms;i++) delay_us(1000);
}
#endif

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#ifndef _DELAY_H
#define _DELAY_H
#include <sys.h>
//////////////////////////////////////////////////////////////////////////////////
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB>ѧϰʹ<CFB0>ã<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD><C9A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>κ<EFBFBD><CEBA><EFBFBD>;
//ALIENTEK STM32F407<30><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//ʹ<><CAB9>SysTick<63><6B><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD>ӳٽ<D3B3><D9BD>й<EFBFBD><D0B9><EFBFBD><><D6A7>ucosii)
//<2F><><EFBFBD><EFBFBD>delay_us,delay_ms
//<2F><><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD>@ALIENTEK
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̳:www.openedv.com
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:2017/4/6
//<2F><EFBFBD><E6B1BE>V1.0
//<2F><>Ȩ<EFBFBD><C8A8><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ؾ<EFBFBD><D8BE><EFBFBD>
//Copyright(C) <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿƼ<D3BF><C6BC><EFBFBD><EFBFBD>޹<EFBFBD>˾ 2014-2024
//All rights reserved
//********************************************************************************
//<2F>޸<EFBFBD>˵<EFBFBD><CBB5>
//////////////////////////////////////////////////////////////////////////////////
void delay_init(u8 SYSCLK);
void delay_ms(u16 nms);
void delay_us(u32 nus);
#endif

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@@ -0,0 +1,115 @@
#include "sys.h"
//////////////////////////////////////////////////////////////////////////////////
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB>ѧϰʹ<CFB0>ã<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD><C9A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>κ<EFBFBD><CEBA><EFBFBD>;
//ALIENTEK STM32F407<30><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//ϵͳʱ<CDB3>ӳ<EFBFBD>ʼ<EFBFBD><CABC>
//<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F>жϹ<D0B6><CFB9><EFBFBD>/GPIO<49><4F><EFBFBD>õ<EFBFBD>
//<2F><><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD>@ALIENTEK
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̳:www.openedv.com
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:2017/4/6
//<2F><EFBFBD><E6B1BE>V1.0
//<2F><>Ȩ<EFBFBD><C8A8><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ؾ<EFBFBD><D8BE><EFBFBD>
//Copyright(C) <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿƼ<D3BF><C6BC><EFBFBD><EFBFBD>޹<EFBFBD>˾ 2014-2024
//All rights reserved
//********************************************************************************
//<2F>޸<EFBFBD>˵<EFBFBD><CBB5>
//<2F><>
//////////////////////////////////////////////////////////////////////////////////
//ʱ<><CAB1>ϵͳ<CFB5><CDB3><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>
//Fvco=Fs*(plln/pllm);
//SYSCLK=Fvco/pllp=Fs*(plln/(pllm*pllp));
//Fusb=Fvco/pllq=Fs*(plln/(pllm*pllq));
//Fvco:VCOƵ<4F><C6B5>
//SYSCLK:ϵͳʱ<CDB3><CAB1>Ƶ<EFBFBD><C6B5>
//Fusb:USB,SDIO,RNG<4E>ȵ<EFBFBD>ʱ<EFBFBD><CAB1>Ƶ<EFBFBD><C6B5>
//Fs:PLL<4C><4C><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ƶ<EFBFBD><C6B5>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>HSI,HSE<53><45>.
//plln:<3A><>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL<4C><4C>Ƶ),ȡֵ<C8A1><D6B5>Χ:64~432.
//pllm:<3A><>PLL<4C><4C><EFBFBD><EFBFBD>ƵPLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮ǰ<D6AE>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2~63.
//pllp:ϵͳʱ<CDB3>ӵ<EFBFBD><D3B5><EFBFBD>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮<4C><D6AE><EFBFBD>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2,4,6,8.(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4<EFBFBD><34>ֵ!)
//pllq:USB/SDIO/<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮<4C><D6AE><EFBFBD>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2~15.
//<2F>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD>Ϊ8M<38><4D>ʱ<EFBFBD><CAB1>,<2C>Ƽ<EFBFBD>ֵ:plln=336,pllm=8,pllp=2,pllq=7.
//<2F>õ<EFBFBD>:Fvco=8*(336/8)=336Mhz
// SYSCLK=336/2=168Mhz
// Fusb=336/7=48Mhz
//<2F><><EFBFBD><EFBFBD>ֵ:0,<2C>ɹ<EFBFBD>;1,ʧ<><CAA7>
void Stm32_Clock_Init(u32 plln,u32 pllm,u32 pllp,u32 pllq)
{
HAL_StatusTypeDef ret = HAL_OK;
RCC_OscInitTypeDef RCC_OscInitStructure;
RCC_ClkInitTypeDef RCC_ClkInitStructure;
__HAL_RCC_PWR_CLK_ENABLE(); //ʹ<><CAB9>PWRʱ<52><CAB1>
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ա<EFBFBD><D4B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD>
//ʱʹ<CAB1><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EBB9A6>ʵ<EFBFBD><CAB5>ƽ<EFBFBD>
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);//<2F><><EFBFBD>õ<EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD>1
RCC_OscInitStructure.OscillatorType=RCC_OSCILLATORTYPE_HSE; //ʱ<><CAB1>ԴΪHSE
RCC_OscInitStructure.HSEState=RCC_HSE_ON; //<2F><><EFBFBD><EFBFBD>HSE
RCC_OscInitStructure.PLL.PLLState=RCC_PLL_ON;//<2F><><EFBFBD><EFBFBD>PLL
RCC_OscInitStructure.PLL.PLLSource=RCC_PLLSOURCE_HSE;//PLLʱ<4C><CAB1>Դѡ<D4B4><D1A1>HSE
RCC_OscInitStructure.PLL.PLLM=pllm; //<2F><>PLL<4C><4C><EFBFBD><EFBFBD>ƵPLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮ǰ<D6AE>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2~63.
RCC_OscInitStructure.PLL.PLLN=plln; //<2F><>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL<4C><4C>Ƶ),ȡֵ<C8A1><D6B5>Χ:64~432.
RCC_OscInitStructure.PLL.PLLP=pllp; //ϵͳʱ<CDB3>ӵ<EFBFBD><D3B5><EFBFBD>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮<4C><D6AE><EFBFBD>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2,4,6,8.(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4<EFBFBD><34>ֵ!)
RCC_OscInitStructure.PLL.PLLQ=pllq; //USB/SDIO/<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD>PLL<4C><4C>Ƶϵ<C6B5><CFB5>(PLL֮<4C><D6AE><EFBFBD>ķ<EFBFBD>Ƶ),ȡֵ<C8A1><D6B5>Χ:2~15.
ret=HAL_RCC_OscConfig(&RCC_OscInitStructure);//<2F><>ʼ<EFBFBD><CABC>
if(ret!=HAL_OK) while(1);
//ѡ<><D1A1>PLL<4C><4C>Ϊϵͳʱ<CDB3><CAB1>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>HCLK,PCLK1<4B><31>PCLK2
RCC_ClkInitStructure.ClockType=(RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStructure.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK;//<2F><><EFBFBD><EFBFBD>ϵͳʱ<CDB3><CAB1>ʱ<EFBFBD><CAB1>ԴΪPLL
RCC_ClkInitStructure.AHBCLKDivider=RCC_SYSCLK_DIV1;//AHB<48><42>Ƶϵ<C6B5><CFB5>Ϊ1
RCC_ClkInitStructure.APB1CLKDivider=RCC_HCLK_DIV4; //APB1<42><31>Ƶϵ<C6B5><CFB5>Ϊ4
RCC_ClkInitStructure.APB2CLKDivider=RCC_HCLK_DIV2; //APB2<42><32>Ƶϵ<C6B5><CFB5>Ϊ2
ret=HAL_RCC_ClockConfig(&RCC_ClkInitStructure,FLASH_LATENCY_5);//ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>FLASH<53><48>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ5WS<57><53>Ҳ<EFBFBD><D2B2><EFBFBD><EFBFBD>6<EFBFBD><36>CPU<50><55><EFBFBD>ڡ<EFBFBD>
if(ret!=HAL_OK) while(1);
//STM32F405x/407x/415x/417x Z<><EFBFBD><E6B1BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֧<EFBFBD><D6A7>Ԥȡ<D4A4><C8A1><EFBFBD><EFBFBD>
if (HAL_GetREVID() == 0x1001)
{
__HAL_FLASH_PREFETCH_BUFFER_ENABLE(); //ʹ<><CAB9>flashԤȡ
}
}
#ifdef USE_FULL_ASSERT
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>˺<EFBFBD><CBBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//file<6C><65>ָ<EFBFBD><D6B8>Դ<EFBFBD>ļ<EFBFBD>
//line<6E><65>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD>
void assert_failed(uint8_t* file, uint32_t line)
{
while (1)
{
}
}
#endif
//THUMBָ<42>֧<EEB2BB>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD>ʵ<EFBFBD><CAB5>ִ<EFBFBD>л<EFBFBD><D0BB><EFBFBD>ָ<EFBFBD><D6B8>WFI
__asm void WFI_SET(void)
{
WFI;
}
//<2F>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>(<28><><EFBFBD>Dz<EFBFBD><C7B2><EFBFBD><EFBFBD><EFBFBD>fault<6C><74>NMI<4D>ж<EFBFBD>)
__asm void INTX_DISABLE(void)
{
CPSID I
BX LR
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
__asm void INTX_ENABLE(void)
{
CPSIE I
BX LR
}
//<2F><><EFBFBD><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD>ַ
//addr:ջ<><D5BB><EFBFBD><EFBFBD>ַ
__asm void MSR_MSP(u32 addr)
{
MSR MSP, r0 //set Main Stack value
BX r14
}

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@@ -0,0 +1,46 @@
#ifndef _SYS_H
#define _SYS_H
#include "stm32f4xx.h"
//0,<2C><>֧<EFBFBD><D6A7>os
//1,֧<><D6A7>os
#define SYSTEM_SUPPORT_OS 0 //<2F><><EFBFBD><EFBFBD>ϵͳ<CFB5>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>Ƿ<EFBFBD>֧<EFBFBD><D6A7>OS
///////////////////////////////////////////////////////////////////////////////////
//<2F><><EFBFBD><EFBFBD>һЩ<D2BB><D0A9><EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͷ̹ؼ<CCB9><D8BC><EFBFBD>
typedef int32_t s32;
typedef int16_t s16;
typedef int8_t s8;
typedef const int32_t sc32;
typedef const int16_t sc16;
typedef const int8_t sc8;
typedef __IO int32_t vs32;
typedef __IO int16_t vs16;
typedef __IO int8_t vs8;
typedef __I int32_t vsc32;
typedef __I int16_t vsc16;
typedef __I int8_t vsc8;
typedef uint32_t u32;
typedef uint16_t u16;
typedef uint8_t u8;
typedef const uint32_t uc32;
typedef const uint16_t uc16;
typedef const uint8_t uc8;
typedef __IO uint32_t vu32;
typedef __IO uint16_t vu16;
typedef __IO uint8_t vu8;
typedef __I uint32_t vuc32;
typedef __I uint16_t vuc16;
typedef __I uint8_t vuc8;
void Stm32_Clock_Init(u32 plln,u32 pllm,u32 pllp,u32 pllq);//ʱ<><CAB1>ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD>
#endif